component

CA-IS3640HW

Public Made by Adom

by adom

Chipanalog Digital Isolators (With Power), SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsignal isolation devicesca-is3640hwfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 13d ago
viewers ca-is3640hw: viewers · Ray 13d ago
ca-is3640hw-etched.glb Publish 0.1.0 · Ray 13d ago
ca-is3640hw-etched.step ca-is3640hw: factory component page (tier=lcsc) · Ray 13d ago
ca-is3640hw-hero.glb ca-is3640hw: hero GLB from the etched model (keeps the MPN mark) · Ray 13d ago
ca-is3640hw-hero.overlay.json Publish 0.1.0 · Ray 13d ago
ca-is3640hw.glb Publish 0.1.0 · Ray 13d ago
ca-is3640hw.kicad_mod Publish 0.1.0 · Ray 13d ago
ca-is3640hw.kicad_sym Publish 0.1.0 · Ray 13d ago
ca-is3640hw.lbr Publish 0.1.0 · Ray 13d ago
ca-is3640hw.step Publish 0.1.0 · Ray 13d ago
package.json Publish 0.1.0 · Ray 13d ago
page.json Set visibility: public · Ray 13d ago
README.md Publish 0.1.0 · Ray 13d ago

CA-IS3640HW

Chipanalog · Digital Isolators (With Power) · SOIC-16-300mil

CA-IS3640HW from Chipanalog, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in A-side supply that powers the internal DC-DC converter and, on the W (non-V) variant, sets the A-side input threshold and output levels; recommended 3.15 V to 5.5 V, with 0.1 µF and 10 µF bypass capacitors placed within 2 mm of the pin.
2 GNDA power_in A-side ground reference for the isolated side A logic and supply.
3 VI1/VO1 bidirectional A-side logic input VI1 for the CA-IS3640 channel; the pin is an input in this part and its logic levels are set by VDD.
4 VI2/VO2 bidirectional A-side logic input VI2 for the CA-IS3640 channel, with logic levels set by VDD.
5 VI3/VO3 bidirectional A-side logic input VI3 for the CA-IS3640 channel, with logic levels set by VDD.
6 VI4/VO4 bidirectional A-side logic input VI4 for the CA-IS3640 channel, with logic levels set by VDD.
7 NC unconnected No internal connection on the W variant; this pin becomes VDDL only on the VW variant, which the CA-IS3640HW does not have.
8 GNDA power_in A-side ground reference, bonded to pin 2.
9 GNDB power_in B-side ground reference for the isolated side B logic and the VISO output.
10 SEL input VISO output-voltage select: tie to VISO for 5 V, tie to GNDB or leave floating for 3.3 V (internal weak pull-down to GNDB), and do not change its level during start-up.
11 VI4/VO4 bidirectional B-side logic input VI4 for the CA-IS3640 channel.
12 VI3/VO3 bidirectional B-side logic input VI3 for the CA-IS3640 channel.
13 VI2/VO2 bidirectional B-side logic input VI2 for the CA-IS3640 channel.
14 VI1/VO1 bidirectional B-side logic input VI1 for the CA-IS3640 channel.
15 GNDB power_in B-side ground reference, bonded to pin 9.
16 VISO power_out Isolated output voltage set by SEL (5 V or 3.3 V), rated up to 80 mA at 5 V and 45 mA at 3.3 V for CA-IS3640 at 100 Mbps and TA = 25 °C, with 0.1 µF and 10 µF bypass capacitors within 2 mm of the pin to GNDB.

Key specifications

Parameter Value
Manufacturer Chipanalog
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

CAD (KiCad official)

  • Symbol: CA-IS3640HW
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ca-is3640hw-etched.step / ca-is3640hw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca-is3640hw.step / ca-is3640hw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (39 pp, sha256 8b1ede7cbc4fcd86, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF