component
CA-IS3021W
Public Made by Adomby adom
Chipanalog I2C Isolators, SOIC-16-300mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
ca-is3021w: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
4ef6f9e
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{
"schema_version": 1,
"type": "component",
"slug": "ca-is3021w",
"title": "CA-IS3021W",
"brief": "Chipanalog I2C Isolators, SOIC-16-300mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"signal isolation devices",
"ca-is3021w"
],
"component": {
"mpn": "CA-IS3021W",
"manufacturer": "Chipanalog",
"package": "SOIC-16-300mil",
"pin_count": 16,
"category": "Signal Isolation Devices",
"subcategory": "I2C Isolators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602834765829447680",
"parts": {
"symbol": "ca-is3021w.kicad_sym",
"footprint": "ca-is3021w.kicad_mod",
"model_3d": "ca-is3021w-etched.glb",
"model_3d_plain": "ca-is3021w.glb",
"model_3d_step": "ca-is3021w-etched.step",
"model_3d_step_plain": "ca-is3021w.step",
"lbr": "ca-is3021w.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "GNDA",
"type": "power_in",
"description": "Side A ground reference."
},
{
"number": "2",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "3",
"name": "VDDA",
"type": "power_in",
"description": "Side A supply input, 3.0 V to 5.5 V. Bypass to GNDA with a local decoupling capacitor."
},
{
"number": "4",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "5",
"name": "SDAA",
"type": "bidirectional",
"description": "Side A bidirectional I2C data (open-drain). Mirrors SDAB across the isolation barrier; requires external pull-up to VDDA."
},
{
"number": "6",
"name": "SCLA",
"type": "input",
"description": "Side A I2C clock input. Drives the unidirectional SCL channel that appears at SCLB on side B."
},
{
"number": "7",
"name": "GNDA",
"type": "power_in",
"description": "Side A ground reference (redundant pin, tie to pin 1)."
},
{
"number": "8",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "9",
"name": "GNDB",
"type": "power_in",
"description": "Side B ground reference."
},
{
"number": "10",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "11",
"name": "SCLB",
"type": "output",
"description": "Side B I2C clock output (open-drain), driven from SCLA on side A. Requires external pull-up to VDDB."
},
{
"number": "12",
"name": "SDAB",
"type": "bidirectional",
"description": "Side B bidirectional I2C data (open-drain). Mirrors SDAA across the isolation barrier; requires external pull-up to VDDB."
},
{
"number": "13",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "14",
"name": "VDDB",
"type": "power_in",
"description": "Side B supply input, 3.0 V to 5.5 V. Bypass to GNDB with a local decoupling capacitor."
},
{
"number": "15",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Leave floating (do not connect externally)."
},
{
"number": "16",
"name": "GNDB",
"type": "power_in",
"description": "Side B ground reference (redundant pin, tie to pin 9)."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602834765829447680",
"pages": 22,
"sha256": "f22cb16e7b686413",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ca-is3021w.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
9.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ca-is3021w-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
9.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "ae1a3ead25057b92d41b9df045e414f0ca889b91f48a765530400c61557c40d3",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Chipanalog",
"Package": "SOIC-16-300mil",
"Category": "Signal Isolation Devices",
"Pins": "16"
}
},
"variants": [
{
"mpn": "CA-IS3021WW",
"kind": "packaging"
},
{
"mpn": "CA-IS3021WG",
"kind": "packaging"
},
{
"mpn": "CA-IS3021WS",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ca-is3021w"
],
"discovery_pitch": "CA-IS3021W (Chipanalog) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ca-is3021w.kicad_sym",
"ca-is3021w.kicad_mod",
"ca-is3021w.glb",
"ca-is3021w.step",
"ca-is3021w.lbr",
"docs/hero.png",
"docs/ca-is3021w-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T18:24:13.042Z"
}