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Contents

README

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CA-IF1043DF-Q1

Chipanalog · CAN ICs · DFN-14(3x4.5)

CA-IF1043DF-Q1 from Chipanalog, in a DFN-14(3x4.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data input; TXD high drives the CAN bus recessive, TXD low drives it dominant, with an internal pull-up resistor.
2 GND power_in Ground reference.
3 VCC power_in 5V supply input (4.5V to 5.5V recommended); place a 0.1uF capacitor between VCC and GND as close to the device as possible.
4 RXD output Receiver data output, referenced to VIO; high when the bus is recessive and low when the bus is dominant.
5 VIO power_in I/O level-shifting supply voltage, 1.7V to 5.5V recommended.
6 EN input Enable input for mode control, with an internal pull-down resistor.
7 INH output High-voltage inhibit output used to enable external power supply regulators; driven high (VSUP minus a drop) except in sleep mode where it is high impedance.
8 nFAULT output Fault output, active low indicates a fault has occurred; also indicates wake request/source and power-on status.
9 WAKE input High-voltage wake-up input for local wake-up, with an input range of -58V to 58V absolute maximum.
10 VSUP power_in Battery supply input, 4.5V to 45V recommended.
11 NC unconnected No connect.
12 CANL bidirectional Low-level CAN bus line, with bus fault protection to ±58V.
13 CANH bidirectional High-level CAN bus line, with bus fault protection to ±58V.
14 nSTB input Standby mode control input, with an internal pull-down resistor.
15 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Chipanalog
Package DFN-14(3x4.5)
Category Communication Interface Chip/UART/485/232
Pins 15

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VSUP battery voltage range VSUP -0.3 58 V 5
VCC 5-V bus supply voltage VCC -0.3 7 V 5
VIO level-shift supply voltage VIO -0.3 7 V 5
CAN bus IO voltage VBUS -58 58 V CANH, CANL 5
Max differential voltage CANH-CANL V(DIFF) -58 58 V 5
Logic input voltage V(Logic_Input) -0.3 7 V TXD, STB 5
Logic output voltage V(Logic_Output) -0.3 7 V RXD 5
INH output pin voltage VINH -0.3 58 V 58 and less than Vsup+0.3 5
WAKE pin input voltage V(wake) -58 58 V 5
Logic output current IO(LOGIC) 8 mA RXD, nFAULT 5
INH output current IO(INH) 4 mA 5
WAKE pin current IO(WAKE) 3 mA 5
Junction temperature TJ -55 150 °C 5
VSUP battery voltage VSUP 4.5 45 V 5
VCC 5-V bus supply voltage VCC 4.5 5.5 V 5
VIO level-shift supply voltage VIO 1.7 5.5 V 5
RXD low-level output current IOL(RXD) 2 mA 5
INH output current IO(INH) 2 mA 5
Operating temperature range TA -40 125 °C 5
HBM ESD, all pins HBM -4000 4000 V All pins 5
HBM ESD, CANH/CANL to GND HBM -8000 8000 V CAN bus port to GND 5
CDM ESD CDM -1500 1500 V All pins 5
Junction-to-ambient thermal resistance RθJA 35.1 °C/W DFN14 6
VSUP supply current, normal/silent/go-to-sleep ISUP 45 80 uA Normal, silent, go-to-sleep modes 6
VSUP supply current, standby ISUP 40 80 uA Standby mode, VINH=V(WAKE)=VSUP 6
VSUP supply current, sleep ISUP 35 70 uA Sleep mode, Vcc=VIO=VINH=0V, V(WAKE)=VSUP 6
VCC supply current, dominant 60 Ohm Icc 48 70 mA TXD=0V, RL=60 Ohm (dominant) 6
VCC supply current, dominant 50 Ohm Icc 50 80 mA TXD=0V, RL=50 Ohm (dominant) 6
VCC supply current, dominant CANH short Icc 84 110 mA TXD=0V, CANH=-25V (dominant) 6
VCC supply current, recessive Icc 1.8 5 mA TXD=VIO, RL=50 Ohm (recessive) 6
VCC supply current, silent/go-to-sleep Icc 1 2.5 mA Silent and go-to-sleep, TXD=VIO, RL=50 Ohm 6
VCC supply current, standby Icc 1.2 5 uA Standby, EN=L, nSTB=L 6
VCC supply current, sleep Icc 2 5 uA Sleep, EN=H or L, nSTB=L 6
VIO supply current, normal dominant IIO 110 450 uA Normal (dominant), TXD=0V, nSTB=VIO, EN=VIO 6
VIO supply current, recessive/silent IIO 3.5 5 uA Normal (recessive), silent or go-to-sleep, TXD=VIO 6
VIO supply current, sleep IIO 3 5 uA Sleep mode, nSTB=L 6
VSUP UVLO threshold Vuv_SUP 2.5 3.65 4.2 V Rising 6
VCC UVLO threshold Vuv_vcc 4.1 4.45 V Rising 6
VIO UVLO threshold Vuv_vio 1.4 1.56 1.7 V Rising 6
VSUP UVLO hysteresis VHYS(UVSUP) 50 mV Hysteresis 6
VCC UVLO hysteresis VHYS(VCC) 200 mV Hysteresis 6
VIO UVLO hysteresis VHYS(UVIO) 80 mV Hysteresis 6
nSTB/EN input high leakage current IIH 20 200 uA nSTB=EN=VCC=5.5V 6
nSTB/EN unpowered leakage current Ilek(off) -1 1 uA nSTB=EN=5.5V, VCC=VIO=0V 6
TXD input high leakage current IIH -2.5 0 1 uA TXD=VCC=5.5V 6
TXD input low leakage current IIL -200 -20 uA TXD=0V, VCC=5.5V 6
TXD unpowered leakage current Ilek(off) -1 0 1 uA TXD=5.5V, VCC=0V 6
TXD input capacitance Ci 5 pF 6
RXD output low voltage VOL 0.22 V Io=+2mA 6
RXD unpowered leakage current Ilek(off) -1 0 1 uA RXD=5.5V, VCC=0V 6
nFAULT unpowered leakage current Ilek(off) -1 0 1 uA nFAULT=5.5V, VCC=0V 7
INH high-level voltage drop from VSUP ΔVH 2 V IINH=-1mA 7
INH leakage current VLKG(INH) -2 2 uA INH=0V, sleep mode 7
INH short-circuit current Io(sc) -26 mA VINH=0V 7
WAKE input high leakage current IIH -25 -5 uA WAKE=Vsup-1V 7
WAKE input low leakage current IIL 10 25 uA WAKE=1V 7
Dominant output voltage CANH VO(DOM) 2.75 4.5 V TXD=L, nSTB=VIO, RL=50-65 Ohm, CANH 7
Dominant output voltage CANL VO(DOM) 0.5 2.25 V TXD=L, nSTB=VIO, RL=50-65 Ohm, CANL 7
Dominant differential output voltage VO(DOM) 1.5 3 V TXD=L, RL=60 Ohm, RCM=165 Ohm, -5V<=VCM<=+10V 7
Standby bus voltage CANH-CANL VO(STB) -0.2 0.2 V STB=VCC, RL open, CANH-CANL 7
Receiver common-mode input range VCM -30 30 V Normal and standby modes, RXD output valid 7
Over-temperature shutdown TTSD 190 °C 7

CAD (KiCad official)

  • Symbol: CA-IF1043DF-Q1
  • Footprint: Package_DFN_QFN:DFN-14-1EP_3x4.5mm_P0.65mm_EP1.65x4.25mm
  • 3D model: DFN-14(3x4.5) (KiCad packages3D, STEP)
  • 3D model files: ca-if1043df-q1-etched.step / ca-if1043df-q1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca-if1043df-q1.step / ca-if1043df-q1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (32 pp, sha256 9bafe112cde9cf45, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF