component
C8051F392-A-GMR
Public Made by Adomby adom
SKYWORKS SILICON LABS Microcontrollers (MCU/MPU/SOC), QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
C8051F392-A-GMR
SKYWORKS SILICON LABS · Microcontrollers (MCU/MPU/SOC) · QFN-20-EP(4x4)
C8051F392-A-GMR from SKYWORKS SILICON LABS, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.0/VREF | bidirectional | Port 0.0 digital I/O or analog input; also the external VREF input when the external voltage reference is used. |
| 2 | GND | power_in | Ground; this ground connection is required, and the center pad may optionally be connected to ground also. |
| 3 | VDD | power_in | Power supply voltage; the device is specified for 1.8 to 3.6 V operation. |
| 4 | RST/C2CK | bidirectional | Device reset as an open-drain output of the internal POR or VDD monitor, where an external source can start a system reset by driving it low for at least 10 μs; this pin also carries the C2CK clock for the C2 debug interface. |
| 5 | C2D/P2.0 | bidirectional | Bi-directional data signal for the C2 debug interface, shared with Port 2.0 on 20-pin packaging. |
| 6 | P1.7 | bidirectional | Port 1.7 digital I/O or analog input. |
| 7 | P1.6 | bidirectional | Port 1.6 digital I/O or analog input. |
| 8 | P1.5 | bidirectional | Port 1.5 digital I/O or analog input. |
| 9 | P1.4 | bidirectional | Port 1.4 digital I/O or analog input. |
| 10 | P1.3 | bidirectional | Port 1.3 digital I/O or analog input. |
| 11 | P1.2 | bidirectional | Port 1.2 digital I/O or analog input. |
| 12 | P1.1 | bidirectional | Port 1.1 digital I/O or analog input. |
| 13 | P1.0/IDA1 | bidirectional | Port 1.0 digital I/O or analog input; on 20-pin devices this pin is also the IDA1 current DAC output. |
| 14 | P0.7 | bidirectional | Port 0.7 digital I/O or analog input. |
| 15 | P0.6/CNVSTR | bidirectional | Port 0.6 digital I/O or analog input; also the ADC0 external convert start or IDA0 update source input CNVSTR. |
| 16 | P0.5 | bidirectional | Port 0.5 digital I/O or analog input; always assigned to UART0 RX by the crossbar. |
| 17 | P0.4 | bidirectional | Port 0.4 digital I/O or analog input; always assigned to UART0 TX by the crossbar. |
| 18 | P0.3/XTAL2 | bidirectional | Port 0.3 digital I/O or analog input; also the XTAL2 external oscillator output for a crystal or resonator, or the clock input for CMOS, capacitor, or RC configurations. |
| 19 | P0.2/XTAL1 | bidirectional | Port 0.2 digital I/O or analog input; also the XTAL1 external clock input and oscillator return for a crystal or resonator. |
| 20 | P0.1/IDA0 | bidirectional | Port 0.1 digital I/O or analog input; also the IDA0 current DAC output. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SKYWORKS SILICON LABS |
| Package | QFN-20-EP(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Temperature under Bias | -55 | 125 | °C | 32 | |||
| Storage Temperature | -65 | 150 | °C | 32 | |||
| Voltage on any Port I/O Pin or RST with respect to GND | -0.3 | V | 32 | ||||
| Voltage on VDD with Respect to GND | VDD | -0.3 | 4.2 | V | 32 | ||
| Maximum Total Current through VDD or GND | 100 | mA | 32 | ||||
| Maximum Output Current Sunk by RST or any Port Pin | 100 | mA | 32 | ||||
| Supply Voltage (VDD) | VDD | 3 | 3.6 | V | Normal Operation | 33 | |
| Supply Voltage (VDD) for writing or erasing Flash | VDD | 1.8 | 3 | 3.6 | V | Writing or Erasing Flash Memory | 33 |
| SYSCLK (System Clock) | SYSCLK | 0 | 50 | MHz | 33 | ||
| SYSCLK High Time | TSYSH | 9.5 | ns | 33 | |||
| SYSCLK Low Time | TSYSL | 9.5 | ns | 33 | |||
| Specified Operating Temperature Range (C8051F39x) | -40 | 105 | °C | C8051F39x | 33 | ||
| Digital Supply Current, CPU Active (Normal Mode) | IDD | 7.1 | 7.8 | mA | VDD = 3.6 V, F = 50 MHz | 33 | |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | 7 | 7.7 | mA | VDD = 3.0 V, F = 50 MHz | 33 | |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | 4.6 | 5.2 | mA | VDD = 3.6 V, F = 25 MHz | 33 | |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | 4.5 | 5.1 | mA | VDD = 3.0 V, F = 25 MHz | 33 | |
| Output Low Voltage | 0.6 | V | IOL = 8.5 mA | 35 | |||
| Output Low Voltage | 0.1 | V | IOL = 10 μA | 35 | |||
| Input Low Voltage | 0.5 | V | 1.8 V ≤ VDD < 2.7 V | 35 | |||
| Input Low Voltage | 0.6 | V | 2.7 V ≤ VDD ≤ 3.6 V | 35 | |||
| Input Leakage Current | -1 | 1 | μA | Weak Pullup Off | 35 | ||
| RST Output Low Voltage | 0.6 | V | IOL = 4 mA, VDD = 1.8 to 3.6 V | 36 | |||
| RST Input Low Voltage | 0.6 | V | 36 | ||||
| RST Input Pullup Current | 20 | 100 | μA | RST = 0.0 V | 36 | ||
| VDD POR Threshold (VRST_LOW) | VRST_LOW | 1.7 | 1.75 | 1.8 | V | 36 | |
| VDD POR Threshold (VRST_HIGH) | VRST_HIGH | 2.4 | 2.55 | 2.7 | V | 36 | |
| Missing Clock Detector Timeout | 80 | 580 | 800 | μs | Time from last system clock rising edge to reset initiation | 36 | |
| Minimum RST Low Time to Generate a System Reset | 15 | μs | 36 | ||||
| VDD Monitor Supply Current | 20 | 50 | μA | 36 | |||
| Flash Endurance | 20000 | 100000 | Erase/Write | 37 | |||
| Flash Erase Cycle Time | 23 | 25 | 27 | ms | 37 | ||
| Flash Write Cycle Time | 58 | 61 | 64 | μs | 37 | ||
| Oscillator Frequency, internal high-frequency oscillator (C8051F390/1/2/3) | 48 | 49 | 50 | MHz | 38 | ||
| Oscillator Frequency, internal low-frequency oscillator (C8051F390/1/2/3) | 75 | 80 | 85 | kHz | 38 | ||
| Oscillator Frequency, internal low-power oscillator (C8051F390/1/2/3) | 18.5 | 20 | 21.5 | MHz | 38 | ||
| ADC0 Differential Nonlinearity | -1 | 1 | LSB | 39 | |||
| ADC0 Offset Error | -2 | 0 | 2 | LSB | 39 | ||
| ADC0 Full Scale Error | -5 | -2 | 1 | LSB | 39 | ||
| ADC0 Signal-to-Noise Plus Distortion | 55 | 58 | dB | 10 kHz sine-wave single-ended input, 1 dB below Full Scale, 500 ksps | 39 | ||
| ADC0 Throughput Rate | 500 | ksps | 39 | ||||
| ADC0 Input Voltage Range, Single Ended (AIN+, GND) | 0 | V | Single Ended (AIN+, GND) | 39 | |||
| ADC0 Absolute Pin Voltage with respect to GND | 0 | V | Single Ended or Differential | 39 | |||
| ADC0 Power Supply Current (VDD supplied to ADC0) | 860 | 1010 | μA | Operating Mode, 500 ksps | 39 | ||
| Precision Temperature Sensor Range | -40 | 105 | °C | 40 | |||
| Precision Temperature Sensor Absolute Error | -2 | 0.2 | 2 | °C | 40 | ||
| Precision Temperature Sensor Supply Current | 230 | 280 | μA | 40 | |||
| Precision Temperature Sensor Clock Frequency (FTS0) | FTS0 | 320 | 520 | 730 | kHz | 40 | |
| Voltage Reference Output Voltage (2.4 V Setting) | 2.37 | 2.4 | 2.43 | V | 2.4 V Setting (REFBE = 1) | 41 | |
| Voltage Reference Output Voltage (1.2 V Setting) | 1.18 | 1.2 | 1.22 | V | 1.2 V Setting (REFBE = 1) | 41 | |
| VREF Short-Circuit Current | 9 | mA | REFBE = 1 | 41 | |||
| External VREF Input Voltage Range | 1 | V | External Reference (REFBE = 0) | 41 | |||
| Voltage Reference Supply Current | 70 | 100 | μA | REFBE = "1" or TEMPE = "1" | 41 | ||
| Voltage Regulator Output Voltage | 1.73 | 1.78 | 1.83 | V | 41 | ||
| IDAC Integral Nonlinearity | -3 | 3 | LSB | 42 | |||
| IDAC Full Scale Error, 2 mA Full Scale Output Current | -122 | 0 | 40 | μA | 2 mA Full Scale Output Current | 42 | |
| IDAC Full Scale Error, 1 mA Full Scale Output Current | -61 | 0 | 20 | μA | 1 mA Full Scale Output Current | 42 | |
| IDAC Full Scale Error, 0.5 mA Full Scale Output Current | -31 | 0 | 10 | μA | 0.5 mA Full Scale Output Current | 42 | |
| Comparator0 Common-Mode Rejection Ratio | 0.6 | 5 | mV/V | 43 | |||
| Comparator0 Supply Current at DC Mode 0 | 32 | 50 | μA | DC Mode 0 | 44 | ||
| Comparator0 Supply Current at DC Mode 3 | 2 | 8 | μA | DC Mode 3 | 44 |
CAD (KiCad official)
- Symbol:
C8051F392-A-GMR - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
c8051f392-a-gmr-etched.step/c8051f392-a-gmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);c8051f392-a-gmr.step/c8051f392-a-gmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SKYWORKS SILICON LABS datasheet (303 pp, sha256
4d666090a43badcf, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# C8051F392-A-GMR
**SKYWORKS SILICON LABS** · Microcontrollers (MCU/MPU/SOC) · QFN-20-EP(4x4)
C8051F392-A-GMR from SKYWORKS SILICON LABS, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.0/VREF | bidirectional | Port 0.0 digital I/O or analog input; also the external VREF input when the external voltage reference is used. |
| 2 | GND | power_in | Ground; this ground connection is required, and the center pad may optionally be connected to ground also. |
| 3 | VDD | power_in | Power supply voltage; the device is specified for 1.8 to 3.6 V operation. |
| 4 | RST/C2CK | bidirectional | Device reset as an open-drain output of the internal POR or VDD monitor, where an external source can start a system reset by driving it low for at least 10 μs; this pin also carries the C2CK clock for the C2 debug interface. |
| 5 | C2D/P2.0 | bidirectional | Bi-directional data signal for the C2 debug interface, shared with Port 2.0 on 20-pin packaging. |
| 6 | P1.7 | bidirectional | Port 1.7 digital I/O or analog input. |
| 7 | P1.6 | bidirectional | Port 1.6 digital I/O or analog input. |
| 8 | P1.5 | bidirectional | Port 1.5 digital I/O or analog input. |
| 9 | P1.4 | bidirectional | Port 1.4 digital I/O or analog input. |
| 10 | P1.3 | bidirectional | Port 1.3 digital I/O or analog input. |
| 11 | P1.2 | bidirectional | Port 1.2 digital I/O or analog input. |
| 12 | P1.1 | bidirectional | Port 1.1 digital I/O or analog input. |
| 13 | P1.0/IDA1 | bidirectional | Port 1.0 digital I/O or analog input; on 20-pin devices this pin is also the IDA1 current DAC output. |
| 14 | P0.7 | bidirectional | Port 0.7 digital I/O or analog input. |
| 15 | P0.6/CNVSTR | bidirectional | Port 0.6 digital I/O or analog input; also the ADC0 external convert start or IDA0 update source input CNVSTR. |
| 16 | P0.5 | bidirectional | Port 0.5 digital I/O or analog input; always assigned to UART0 RX by the crossbar. |
| 17 | P0.4 | bidirectional | Port 0.4 digital I/O or analog input; always assigned to UART0 TX by the crossbar. |
| 18 | P0.3/XTAL2 | bidirectional | Port 0.3 digital I/O or analog input; also the XTAL2 external oscillator output for a crystal or resonator, or the clock input for CMOS, capacitor, or RC configurations. |
| 19 | P0.2/XTAL1 | bidirectional | Port 0.2 digital I/O or analog input; also the XTAL1 external clock input and oscillator return for a crystal or resonator. |
| 20 | P0.1/IDA0 | bidirectional | Port 0.1 digital I/O or analog input; also the IDA0 current DAC output. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SKYWORKS SILICON LABS |
| Package | QFN-20-EP(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Temperature under Bias | | -55 | | 125 | °C | | 32 |
| Storage Temperature | | -65 | | 150 | °C | | 32 |
| Voltage on any Port I/O Pin or RST with respect to GND | | -0.3 | | | V | | 32 |
| Voltage on VDD with Respect to GND | VDD | -0.3 | | 4.2 | V | | 32 |
| Maximum Total Current through VDD or GND | | | | 100 | mA | | 32 |
| Maximum Output Current Sunk by RST or any Port Pin | | | | 100 | mA | | 32 |
| Supply Voltage (VDD) | VDD | 3 | | 3.6 | V | Normal Operation | 33 |
| Supply Voltage (VDD) for writing or erasing Flash | VDD | 1.8 | 3 | 3.6 | V | Writing or Erasing Flash Memory | 33 |
| SYSCLK (System Clock) | SYSCLK | 0 | | 50 | MHz | | 33 |
| SYSCLK High Time | TSYSH | 9.5 | | | ns | | 33 |
| SYSCLK Low Time | TSYSL | 9.5 | | | ns | | 33 |
| Specified Operating Temperature Range (C8051F39x) | | -40 | | 105 | °C | C8051F39x | 33 |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | | 7.1 | 7.8 | mA | VDD = 3.6 V, F = 50 MHz | 33 |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | | 7 | 7.7 | mA | VDD = 3.0 V, F = 50 MHz | 33 |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | | 4.6 | 5.2 | mA | VDD = 3.6 V, F = 25 MHz | 33 |
| Digital Supply Current, CPU Active (Normal Mode) | IDD | | 4.5 | 5.1 | mA | VDD = 3.0 V, F = 25 MHz | 33 |
| Output Low Voltage | | | | 0.6 | V | IOL = 8.5 mA | 35 |
| Output Low Voltage | | | | 0.1 | V | IOL = 10 μA | 35 |
| Input Low Voltage | | | | 0.5 | V | 1.8 V ≤ VDD < 2.7 V | 35 |
| Input Low Voltage | | | | 0.6 | V | 2.7 V ≤ VDD ≤ 3.6 V | 35 |
| Input Leakage Current | | -1 | | 1 | μA | Weak Pullup Off | 35 |
| RST Output Low Voltage | | | | 0.6 | V | IOL = 4 mA, VDD = 1.8 to 3.6 V | 36 |
| RST Input Low Voltage | | | | 0.6 | V | | 36 |
| RST Input Pullup Current | | | 20 | 100 | μA | RST = 0.0 V | 36 |
| VDD POR Threshold (VRST_LOW) | VRST_LOW | 1.7 | 1.75 | 1.8 | V | | 36 |
| VDD POR Threshold (VRST_HIGH) | VRST_HIGH | 2.4 | 2.55 | 2.7 | V | | 36 |
| Missing Clock Detector Timeout | | 80 | 580 | 800 | μs | Time from last system clock rising edge to reset initiation | 36 |
| Minimum RST Low Time to Generate a System Reset | | 15 | | | μs | | 36 |
| VDD Monitor Supply Current | | | 20 | 50 | μA | | 36 |
| Flash Endurance | | 20000 | 100000 | | Erase/Write | | 37 |
| Flash Erase Cycle Time | | 23 | 25 | 27 | ms | | 37 |
| Flash Write Cycle Time | | 58 | 61 | 64 | μs | | 37 |
| Oscillator Frequency, internal high-frequency oscillator (C8051F390/1/2/3) | | 48 | 49 | 50 | MHz | | 38 |
| Oscillator Frequency, internal low-frequency oscillator (C8051F390/1/2/3) | | 75 | 80 | 85 | kHz | | 38 |
| Oscillator Frequency, internal low-power oscillator (C8051F390/1/2/3) | | 18.5 | 20 | 21.5 | MHz | | 38 |
| ADC0 Differential Nonlinearity | | -1 | | 1 | LSB | | 39 |
| ADC0 Offset Error | | -2 | 0 | 2 | LSB | | 39 |
| ADC0 Full Scale Error | | -5 | -2 | 1 | LSB | | 39 |
| ADC0 Signal-to-Noise Plus Distortion | | 55 | 58 | | dB | 10 kHz sine-wave single-ended input, 1 dB below Full Scale, 500 ksps | 39 |
| ADC0 Throughput Rate | | | | 500 | ksps | | 39 |
| ADC0 Input Voltage Range, Single Ended (AIN+, GND) | | 0 | | | V | Single Ended (AIN+, GND) | 39 |
| ADC0 Absolute Pin Voltage with respect to GND | | 0 | | | V | Single Ended or Differential | 39 |
| ADC0 Power Supply Current (VDD supplied to ADC0) | | | 860 | 1010 | μA | Operating Mode, 500 ksps | 39 |
| Precision Temperature Sensor Range | | -40 | | 105 | °C | | 40 |
| Precision Temperature Sensor Absolute Error | | -2 | 0.2 | 2 | °C | | 40 |
| Precision Temperature Sensor Supply Current | | | 230 | 280 | μA | | 40 |
| Precision Temperature Sensor Clock Frequency (FTS0) | FTS0 | 320 | 520 | 730 | kHz | | 40 |
| Voltage Reference Output Voltage (2.4 V Setting) | | 2.37 | 2.4 | 2.43 | V | 2.4 V Setting (REFBE = 1) | 41 |
| Voltage Reference Output Voltage (1.2 V Setting) | | 1.18 | 1.2 | 1.22 | V | 1.2 V Setting (REFBE = 1) | 41 |
| VREF Short-Circuit Current | | | | 9 | mA | REFBE = 1 | 41 |
| External VREF Input Voltage Range | | 1 | | | V | External Reference (REFBE = 0) | 41 |
| Voltage Reference Supply Current | | | 70 | 100 | μA | REFBE = "1" or TEMPE = "1" | 41 |
| Voltage Regulator Output Voltage | | 1.73 | 1.78 | 1.83 | V | | 41 |
| IDAC Integral Nonlinearity | | -3 | | 3 | LSB | | 42 |
| IDAC Full Scale Error, 2 mA Full Scale Output Current | | -122 | 0 | 40 | μA | 2 mA Full Scale Output Current | 42 |
| IDAC Full Scale Error, 1 mA Full Scale Output Current | | -61 | 0 | 20 | μA | 1 mA Full Scale Output Current | 42 |
| IDAC Full Scale Error, 0.5 mA Full Scale Output Current | | -31 | 0 | 10 | μA | 0.5 mA Full Scale Output Current | 42 |
| Comparator0 Common-Mode Rejection Ratio | | | 0.6 | 5 | mV/V | | 43 |
| Comparator0 Supply Current at DC Mode 0 | | | 32 | 50 | μA | DC Mode 0 | 44 |
| Comparator0 Supply Current at DC Mode 3 | | | 2 | 8 | μA | DC Mode 3 | 44 |
## CAD (KiCad official)
- Symbol: `C8051F392-A-GMR`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm`
- 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `c8051f392-a-gmr-etched.step` / `c8051f392-a-gmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `c8051f392-a-gmr.step` / `c8051f392-a-gmr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SKYWORKS SILICON LABS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904242971357184) (303 pp, sha256 `4d666090a43badcf`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/c8051f392-a-gmr-datasheet.pdf)