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C8051F361-C-GQ

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SILICON LABS Microcontroller Units (MCUs/MPUs/SOCs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerc8051f361-c-gqfactory-2.0.0extractor-text

Verified C8051F361-C-GQ

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier lcsc, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: C8051F361-C-GQ · LQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 290-page datasheet
  • ✓distributor: lcsc C3220743, digikey 336-3434-ND, mouser 634-C8051F361-C-GQ
  • ✓family: LQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jniu09rx/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.43)
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 46 kB, viewers/symbol.html 23 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ c8051f361-c-gq.kicad_sym✓ c8051f361-c-gq.kicad_mod✓ c8051f361-c-gq.step
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Contents

README

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C8051F361-C-GQ

SILICON LABS · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)

C8051F361-C-GQ from SILICON LABS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0.1 bidirectional Port 0.1, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
2 P0.0 bidirectional Port 0.0, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
3 GND power_in Ground.
4 VDD power_in Power supply voltage (2.7-3.6 V for 50 MIPS, 3.0-3.6 V for 100 MIPS).
5 RST/C2CK bidirectional Device reset, an open-drain output of the internal POR or VDD monitor that an external source can drive low for at least 10 µs to initiate a system reset, and also the clock signal for the C2 debug interface.
6 P3.0/C2D bidirectional Port 3.0 (digital I/O or analog input, see Section 17) and the bi-directional data signal for the C2 debug interface.
7 P3.1 bidirectional Port 3.1, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
8 P3.2 bidirectional Port 3.2, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
9 P3.3 bidirectional Port 3.3, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
10 P3.4 bidirectional Port 3.4, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
11 P2.7 bidirectional Port 2.7, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
12 P2.6 bidirectional Port 2.6, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
13 P2.5 bidirectional Port 2.5, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
14 P2.4 bidirectional Port 2.4, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
15 P2.3 bidirectional Port 2.3, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
16 P2.2 bidirectional Port 2.2, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
17 P2.1 bidirectional Port 2.1, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
18 P2.0 bidirectional Port 2.0, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
19 P1.7 bidirectional Port 1.7, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
20 P1.6 bidirectional Port 1.6, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
21 P1.5 bidirectional Port 1.5, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
22 P1.4 bidirectional Port 1.4, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
23 P1.3 bidirectional Port 1.3, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
24 P1.2 bidirectional Port 1.2, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
25 P1.1 bidirectional Port 1.1, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
26 P1.0 bidirectional Port 1.0, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
27 P0.7 bidirectional Port 0.7, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
28 P0.6 bidirectional Port 0.6, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
29 P0.5 bidirectional Port 0.5, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
30 P0.4 bidirectional Port 0.4, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
31 P0.3 bidirectional Port 0.3, digital I/O or analog input; see Section 17 of the datasheet for the complete description.
32 P0.2 bidirectional Port 0.2, digital I/O or analog input; see Section 17 of the datasheet for the complete description.

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package LQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -55 125 °C 33
Storage Temperature -65 150 °C 33
Voltage on any Port I/O Pin or RST with respect to GND -0.3 5.8 V 33
Voltage on VDD with respect to GND VDD -0.3 4.2 V 33
Maximum Total current through VDD or GND 500 mA 33
Maximum output current sunk by RST or any Port pin 100 mA 33
Digital Supply Voltage VDD 2.7 3 3.6 V SYSCLK = 0 to 50 MHz 34
Digital Supply Voltage VDD 3 3.3 3.6 V SYSCLK > 50 MHz 34
Digital Supply RAM Data Retention Voltage 1.5 V 34
SYSCLK (System Clock) SYSCLK 0 100 MHz C8051F360/1/2/3/4/5 34
Specified Operating Temperature Range -40 85 °C 34
Digital Supply Current - CPU Active IDD 68 75 mA VDD = 3.6 V, F = 100 MHz 34
Digital Supply Current - CPU Active IDD 21 25 mA VDD = 3.6 V, F = 25 MHz 34
Digital Supply Current - CPU Active IDD 54 60 mA VDD = 3.0 V, F = 100 MHz 34
Digital Supply Current - CPU Active IDD 16 18 mA VDD = 3.0 V, F = 25 MHz 34
Digital Supply Current - CPU Inactive (Idle) IDD 36 40 mA VDD = 3.6 V, F = 100 MHz 34
Digital Supply Current - CPU Inactive (Idle) IDD 9 12 mA VDD = 3.6 V, F = 25 MHz 34
Digital Supply Current - CPU Inactive (Idle) IDD 30 35 mA VDD = 3.0 V, F = 100 MHz 34
Digital Supply Current - CPU Inactive (Idle) IDD 7 9 mA VDD = 3.0 V, F = 25 MHz 34
Digital Supply Current (Stop Mode, shutdown) IDD 0.5 µA Oscillator not running, VDD Monitor Disabled 35
RST Output Low Voltage 0.6 V IOL = 8.5 mA, VDD = 2.7 V to 3.6 V 135
RST Input High Voltage 0.7 V 0.7 x VDD 135
RST Input Low Voltage 0.7 V 135
VDD POR Threshold VRST 2.4 2.55 2.7 V 135
Missing Clock Detector Timeout 100 400 600 µs Time from last system clock rising edge to reset initiation 135
Reset Time Delay 40 µs Delay between release of any reset source and code execution at location 0x0000 135
Minimum RST Low Time to Generate a System Reset 15 µs 135
VDD Monitor Supply Current 19 40 µA 135
Flash Erase Cycle Time 8 10 12 ms VDD = 2.7 to 3.6 V; -40 to +85 °C 145
Flash Write Cycle Time 37 47 57 µs VDD = 2.7 to 3.6 V; -40 to +85 °C 145
Internal Reference Output Voltage 2.35 2.42 2.5 V 25 °C ambient 70
VREF Short-Circuit Current 10 mA 70
VREF Temperature Coefficient 25 ppm/°C 70
ADC Bias Generator Current 100 150 µA BIASE = '1' or AD0EN = '1' or IOSCEN = '1' 70
Reference Bias Generator Current 30 50 µA REFBE = '1' or TEMPE = '1' or IDA0EN = '1' 70
Comparator Common-Mode Rejection Ratio 1.26 5 mV/V 80
Comparator Input Offset Voltage -5 5 mV 80
Comparator Supply Current Mode 0 11.4 20 µA Supply Current at DC, Mode 0 80
IDAC Integral Nonlinearity 0.5 2 LSB Full-scale output current set to 2 mA 67
IDAC Differential Nonlinearity 0.5 1 LSB Guaranteed Monotonic 67
IDAC Full Scale Error -15 0 15 LSB 2 mA Full Scale Output Current 67
ADC0 Power Supply Current 450 900 µA Operating Mode, 200 ksps 63
ADC0 SAR Conversion Clock 3 MHz 63
ADC0 Throughput Rate 200 ksps 63

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body 41

CAD (KiCad official)

  • Symbol: C8051F361-C-GQ
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: c8051f361-c-gq-etched.step / c8051f361-c-gq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c8051f361-c-gq.step / c8051f361-c-gq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (290 pp, sha256 254ee0cf02cb1881, retrieved 2026-11-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF