component

C8051F350-GQR

Public Made by Adom

by adom

SKYWORKS SILICON LABS Microcontrollers (MCU/MPU/SOC), TQFP-32(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs c8051f350-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
c8051f350-gqr-etched.fit.json c8051f350-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f350-gqr-etched.glb c8051f350-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f350-gqr-etched.step c8051f350-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f350-gqr.glb Publish 0.1.0 · Ray
c8051f350-gqr.kicad_mod Publish 0.1.0 · Ray
c8051f350-gqr.kicad_sym Publish 0.1.0 · Ray
c8051f350-gqr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
c8051f350-gqr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json c8051f350-gqr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md c8051f350-gqr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

C8051F350-GQR

SKYWORKS SILICON LABS · Microcontrollers (MCU/MPU/SOC) · TQFP-32(7x7)

C8051F350-GQR from SKYWORKS SILICON LABS, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN0.0 input ADC0 analog input channel 0.
2 AIN0.1 input ADC0 analog input channel 1.
3 AIN0.2 input ADC0 analog input channel 2.
4 AIN0.3 input ADC0 analog input channel 3.
5 AIN0.4 input ADC0 analog input channel 4 (present on C8051F350/2 24-bit ADC variants).
6 AIN0.5 input ADC0 analog input channel 5 (present on C8051F350/2).
7 AIN0.6 input ADC0 analog input channel 6 (present on C8051F350/2).
8 AIN0.7 input ADC0 analog input channel 7 (present on C8051F350/2).
9 AGND power_in Analog ground. Must be tied to ground.
10 AV+ power_in Analog supply voltage. Must be tied to +2.7 V to +3.6 V.
11 P2.0/C2D bidirectional Port 2.0 general-purpose digital I/O; also serves as the bi-directional data signal (C2D) for the C2 debug interface.
12 /RST/C2CK bidirectional Device reset. Open-drain output of the internal POR / VDD monitor; drive low ≥15 µs to reset. Also serves as the C2 debug clock (C2CK). 1 kΩ pull-up to VDD recommended.
13 P0.0 bidirectional Port 0.0. Digital I/O with analog-input capability (5 V tolerant).
14 P0.1 bidirectional Port 0.1. Digital I/O with analog-input capability (5 V tolerant).
15 P0.2/XTAL1 bidirectional Port 0.2 digital I/O with analog-input capability; alternate function XTAL1 is the external oscillator return for a crystal or resonator.
16 P0.3/XTAL2 bidirectional Port 0.3 digital I/O; alternate function XTAL2 is the excitation driver for an external crystal or resonator, or a clock input for CMOS/C/RC configurations.
17 P0.4 bidirectional Port 0.4. Digital I/O with analog-input capability (5 V tolerant).
18 P0.5 bidirectional Port 0.5. Digital I/O with analog-input capability (5 V tolerant).
19 P0.6/CNVSTR bidirectional Port 0.6 digital I/O; alternate function CNVSTR is the external convert-start input for the IDACs.
20 P0.7 bidirectional Port 0.7. Digital I/O with analog-input capability (5 V tolerant).
21 VDD power_in Digital supply voltage. Must be tied to +2.7 V to +3.6 V.
22 DGND power_in Digital ground. Must be tied to ground.
23 P1.0 bidirectional Port 1.0. Digital I/O with analog-input capability (5 V tolerant). AIN0.4 mux only present on C8051F351/3.
24 P1.1 bidirectional Port 1.1. Digital I/O with analog-input capability (5 V tolerant).
25 P1.2 bidirectional Port 1.2. Digital I/O with analog-input capability (5 V tolerant).
26 P1.3 bidirectional Port 1.3. Digital I/O with analog-input capability (5 V tolerant).
27 P1.4 bidirectional Port 1.4. Digital I/O with analog-input capability (5 V tolerant).
28 P1.5 bidirectional Port 1.5. Digital I/O with analog-input capability (5 V tolerant).
29 P1.6/IDA0 bidirectional Port 1.6 digital I/O; alternate function IDA0 is the current-output DAC0 analog output.
30 P1.7/IDA1 bidirectional Port 1.7 digital I/O; alternate function IDA1 is the current-output DAC1 analog output.
31 VREF+ bidirectional ADC/DAC positive voltage reference pin. Can be driven externally or connected to the on-chip reference.
32 VREF- bidirectional ADC negative voltage reference pin. Can be driven externally or tied to AGND for single-ended reference use.

Key specifications

Parameter Value
Manufacturer SKYWORKS SILICON LABS
Package TQFP-32(7x7)
Category MCU
Pins 32

Ordering variants

  • C8051F350-GQR
  • C8051F350-GQRGM
  • C8051F350-GQRGMR

CAD (KiCad official)

  • Symbol: C8051F350-GQR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: c8051f350-gqr-etched.step / c8051f350-gqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c8051f350-gqr.step / c8051f350-gqr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
c8051f350-gqr.step 413 KB You want the bare part, or you mark your own boards.
c8051f350-gqr-etched.step 4.2 MB You want the part with C8051F350-GQR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1018 faces against 507 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SKYWORKS SILICON LABS datasheet (234 pp, sha256 7246a42c1e3bc68f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF