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C8051F350-GQ

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SILICON LABS Pre-ordered MCUs, LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersc8051f350-gqfactory-2.0.0extractor-text

Verified C8051F350-GQ

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier lcsc, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: C8051F350-GQ · LQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 234-page datasheet
  • ✓distributor: lcsc C1337138, digikey 336-1270-ND, mouser 634-C8051F350-GQ
  • ✓family: LQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-q3sdfv46/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.36)
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 45 kB, viewers/symbol.html 23 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ c8051f350-gq.kicad_sym✓ c8051f350-gq.kicad_mod✓ c8051f350-gq.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers c8051f350-gq: viewers rendered from the public page · Ray
c8051f350-gq-etched.glb c8051f350-gq: factory component page (tier=lcsc) · Ray
c8051f350-gq-etched.step c8051f350-gq: factory component page (tier=lcsc) · Ray
c8051f350-gq-hero.glb c8051f350-gq: hero GLB from the etched model (keeps the MPN mark) · Ray
c8051f350-gq-hero.overlay.json c8051f350-gq: hero GLB from the etched model (keeps the MPN mark) · Ray
c8051f350-gq.glb Publish 0.1.0 · Ray
c8051f350-gq.kicad_mod Publish 0.1.0 · Ray
c8051f350-gq.kicad_sym Publish 0.1.0 · Ray
c8051f350-gq.lbr Publish 0.1.0 · Ray
c8051f350-gq.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier lcsc, 32 pins · Ray

C8051F350-GQ

SILICON LABS · Pre-ordered MCUs · LQFP-32(7x7)

C8051F350-GQ from SILICON LABS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN0.0 input ADC0 analog input channel 0.
2 AIN0.1 input ADC0 analog input channel 1.
3 AIN0.2 input ADC0 analog input channel 2.
4 AIN0.3 input ADC0 analog input channel 3.
5 AIN0.4 input ADC0 analog input channel 4 on the C8051F350/2 devices.
6 AIN0.5 input ADC0 analog input channel 5 on the C8051F350/2 devices.
7 AIN0.6 input ADC0 analog input channel 6 on the C8051F350/2 devices.
8 AIN0.7 input ADC0 analog input channel 7 on the C8051F350/2 devices.
9 AGND power_in Analog ground; must be tied to ground.
10 AV+ power_in Analog supply voltage; must be tied to +2.7 V to +3.6 V.
11 P2.0/C2D bidirectional Port 2.0 general-purpose I/O; also the bidirectional data signal for the C2 debug interface.
12 /RST/C2CK bidirectional Open-drain device reset that an external source can drive low for at least 15 µs (1 kΩ pull-up to VDD recommended); also the clock signal for the C2 debug interface.
13 P0.0 bidirectional Port 0.0 digital I/O or analog input; see Port I/O section.
14 P0.1 bidirectional Port 0.1 digital I/O or analog input; see Port I/O section.
15 P0.2/XTAL1 bidirectional Port 0.2 digital I/O or analog input; also the external oscillator return for a crystal or resonator.
16 P0.3/XTAL2 bidirectional Port 0.3 digital I/O; also the excitation driver for an external crystal or resonator, or the external clock input for CMOS, capacitor, or RC oscillator configurations.
17 P0.4 bidirectional Port 0.4 digital I/O or analog input; see Port I/O section.
18 P0.5 bidirectional Port 0.5 digital I/O or analog input; see Port I/O section.
19 P0.6/CNVSTR bidirectional Port 0.6 digital I/O or analog input; also the external convert start input for the IDACs.
20 P0.7 bidirectional Port 0.7 digital I/O or analog input; see Port I/O section.
21 VDD power_in Digital supply voltage; must be tied to +2.7 V to +3.6 V.
22 DGND power_in Digital ground; must be tied to ground.
23 P1.0 bidirectional Port 1.0 digital I/O or analog input; see Port I/O section.
24 P1.1 bidirectional Port 1.1 digital I/O or analog input; see Port I/O section.
25 P1.2 bidirectional Port 1.2 digital I/O or analog input; see Port I/O section.
26 P1.3 bidirectional Port 1.3 digital I/O or analog input; see Port I/O section.
27 P1.4 bidirectional Port 1.4 digital I/O or analog input; also receives the raw asynchronous Comparator0 output CP0A when enabled in XBR0.
28 P1.5 bidirectional Port 1.5 digital I/O or analog input; also receives the synchronized Comparator0 output CP0 when enabled in XBR0.
29 P1.6/IDA0 bidirectional Port 1.6 digital I/O or analog input; also the IDAC0 current output when IDA0EN is set.
30 P1.7/IDA1 bidirectional Port 1.7 digital I/O or analog input; also the IDAC1 current output when IDA1EN is set.
31 VREF+ power_in VREF positive voltage pin; see VREF section for complete description.
32 VREF- power_in VREF negative voltage pin; on REV C and later devices it must be connected to GND externally for the internal voltage reference to operate.

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -55 125 °C 29
Storage Temperature -65 150 °C 29
Voltage on AIN0.0-AIN0.7, VREF+, and VREF- with respect to DGND -0.3 V 29
Voltage on any Port 0, 1, or 2 Pin or /RST with respect to DGND -0.3 5.8 V 29
Voltage on VDD with respect to DGND VDD -0.3 4.2 V 29
Voltage on AV+ with respect to AGND AV+ -0.3 4.2 V 29
Maximum output current sunk by any Port 0, 1, or 2 pin 100 mA 29
Maximum output current sunk by any other I/O pin 50 mA 29
Maximum output current sourced by any Port 0, 1, or 2 pin 100 mA 29
Maximum output current sourced by any other I/O pin 50 mA 29
Maximum Total current through VDD, AV+, DGND, and AGND 500 mA 29
Analog Supply Voltage 2.7 3 3.6 V 30
Analog Supply Current (Internal REF, ADC, IDACs, Comparators all active) 0.75 1.3 mA Internal REF, ADC, IDACs, Comparators all active 30
Analog-to-Digital Supply Delta /VDD, AV+/ 0.5 V 30
Digital Supply Voltage 2.7 3 3.6 V 30
Digital Supply Current with CPU active 9.9 11.3 mA VDD = 2.7 V; SYSCLK = 25 MHz 30
Digital Supply Current with CPU active 17.8 20 mA VDD = 2.7 V; SYSCLK = 50 MHz 30
Digital Supply Current with CPU active 13.6 15.5 mA VDD = 3.3 V; SYSCLK = 25 MHz 30
Digital Supply Current with CPU active 24.9 27.1 mA VDD = 3.3 V; SYSCLK = 50 MHz 30
SYSCLK (System Clock) SYSCLK 0 50 MHz 30
Specified Operating Temperature Range -40 85 °C 30
Integral Nonlinearity -15 15 ppm FS 61
Offset Error (Calibrated) -5 5 ppm 61
Gain Error (Calibrated) -0.002 0.002 % 61
Gain Drift vs. Temperature -0.5 0.5 ppm/°C 61
Output Word Rate 1000 sps 61
Analog Input Voltage Range (AIN+, AIN-) 0 V PGA Gain = 1, Unipolar 61
Absolute Voltage on AIN+ or AIN- pin with respect to AGND 0 V Input Buffers OFF 61
Input Current 30 nA Input Buffer ON 61
Common Mode Rejection Ratio 95 110 dB DC 61
Power Supply Rejection 80 dB 62
Burnout Current Source, Positive (AIN+) Channel Current 0.9 2 2.9 µA VREF = 2.5 V 61
Burnout Current Source, Negative (AIN-) Channel Current -0.9 -2 -2.9 µA VREF = 2.5 V 61
AV+ Supply Current to ADC0 230 650 µA 62
Integral Nonlinearity (IDAC) -0.5 0.5 LSB 72
Differential Nonlinearity (IDAC) -1 1 LSB Guaranteed Monotonic 72
Full Scale Output (IDAC) 1.6 2 2.4 mA 2 mA Full Scale Setting 72
Internal Reference Output Voltage 2.35 2.45 2.5 V 25 °C ambient 75
External Reference Input Voltage Range (VREF+, VREF-) 1 2.5 V 75
Voltage on VREF+ or VREF- pin with respect to AGND 0 V 75
Temperature Sensor Linearity -0.4 0.4 °C Single Channel Measurement 77
Temperature Sensor Linearity -0.01 0.01 °C Differential Measurement 77
Input Offset Voltage (Comparator0) -5 5 mV 85
Inverting or Non-Inverting Input Voltage Range (Comparator0) -0.25 V 85
Supply Current at DC (Comparator0) 9.6 20 µA Mode 0 85
Supply Current at DC (Comparator0) 3.8 10 µA Mode 1 85
Supply Current at DC (Comparator0) 1.6 5 µA Mode 2 85
Supply Current at DC (Comparator0) 0.3 2 µA Mode 3 85
/RST Output Low Voltage 0.6 V IOL = 8.5 mA, VDD = 2.7 to 3.6 V 106
/RST Input Pullup Current 25 40 µA /RST = 0.0 V 106
VDD Monitor Threshold VRST 2.4 2.55 2.7 V 106
VDD Monitor Supply Current 20 50 µA 106
VDD Ramp Time 1 ms VDD = 0 V to VRST 106
Flash Size 8192 bytes 112
Endurance 20 100 k Erase/Write 112
Erase Cycle Time 10 15 20 ms 50 MHz System Clock 112
Write Cycle Time 40 55 70 µs 50 MHz System Clock 112
Internal Oscillator Frequency 24 24.5 25 MHz Reset Frequency 136
Input High Voltage 2 V 150
Input Low Voltage 0.8 V 150

CAD (KiCad official)

  • Symbol: C8051F350-GQ
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: c8051f350-gq-etched.step / c8051f350-gq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c8051f350-gq.step / c8051f350-gq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (234 pp, sha256 70bc971f9fc0507f, retrieved 2026-11-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF