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docs c8051f310-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
c8051f310-gqr-etched.fit.json c8051f310-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f310-gqr-etched.glb c8051f310-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f310-gqr-etched.step c8051f310-gqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
c8051f310-gqr.glb Publish 0.1.0 · Ray
c8051f310-gqr.kicad_mod Publish 0.1.0 · Ray
c8051f310-gqr.kicad_sym Publish 0.1.0 · Ray
c8051f310-gqr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
c8051f310-gqr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json c8051f310-gqr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md c8051f310-gqr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

C8051F310-GQR

SKYWORKS SILICON LABS · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

C8051F310-GQR from SKYWORKS SILICON LABS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0.1 bidirectional Port 0.1. Digital I/O, 5 V tolerant with high sink current. Crossbar-configurable to peripheral functions (UART, SMBus, SPI, PCA, timers, comparator).
2 P0.0/VREF bidirectional Port 0.0 (digital I/O) muxed with external VREF input for the 10-bit ADC (F310/1/2/3 only).
3 GND power_in Ground reference (0 V).
4 VDD power_in Power supply voltage input, 2.7 V to 3.6 V.
5 /RST/C2CK bidirectional Active-low device reset (open-drain output of internal POR; external source can pull low >=10 us to reset) muxed with C2 debug clock.
6 P3.0/C2D bidirectional Port 3.0 digital I/O muxed with C2 debug bidirectional data.
7 P3.1 bidirectional Port 3.1. Digital I/O or analog input, 5 V tolerant.
8 P3.2 bidirectional Port 3.2. Digital I/O or analog input, 5 V tolerant.
9 P3.3 bidirectional Port 3.3. Digital I/O or analog input, 5 V tolerant.
10 P3.4 bidirectional Port 3.4. Digital I/O or analog input, 5 V tolerant.
11 P2.7 bidirectional Port 2.7. Digital I/O or analog input, 5 V tolerant.
12 P2.6 bidirectional Port 2.6. Digital I/O or analog input, 5 V tolerant.
13 P2.5 bidirectional Port 2.5. Digital I/O or analog input, 5 V tolerant.
14 P2.4 bidirectional Port 2.4. Digital I/O or analog input, 5 V tolerant.
15 P2.3 bidirectional Port 2.3. Digital I/O or analog input, 5 V tolerant.
16 P2.2 bidirectional Port 2.2. Digital I/O or analog input, 5 V tolerant.
17 P2.1 bidirectional Port 2.1. Digital I/O or analog input, 5 V tolerant.
18 P2.0 bidirectional Port 2.0. Digital I/O or analog input, 5 V tolerant.
19 P1.7 bidirectional Port 1.7. Digital I/O or analog input, 5 V tolerant.
20 P1.6 bidirectional Port 1.6. Digital I/O or analog input, 5 V tolerant.
21 P1.5 bidirectional Port 1.5. Digital I/O or analog input, 5 V tolerant.
22 P1.4 bidirectional Port 1.4. Digital I/O or analog input, 5 V tolerant.
23 P1.3 bidirectional Port 1.3. Digital I/O or analog input, 5 V tolerant.
24 P1.2 bidirectional Port 1.2. Digital I/O or analog input, 5 V tolerant.
25 P1.1 bidirectional Port 1.1. Digital I/O or analog input, 5 V tolerant.
26 P1.0 bidirectional Port 1.0. Digital I/O or analog input, 5 V tolerant.
27 P0.7 bidirectional Port 0.7. Digital I/O, 5 V tolerant, crossbar-configurable to peripherals.
28 P0.6/CNVSTR bidirectional Port 0.6 digital I/O muxed with ADC0 external convert-start input (F310/1/2/3 only).
29 P0.5 bidirectional Port 0.5. Digital I/O, 5 V tolerant, crossbar-configurable to peripherals.
30 P0.4 bidirectional Port 0.4. Digital I/O, 5 V tolerant, crossbar-configurable to peripherals.
31 P0.3/XTAL2 bidirectional Port 0.3 digital I/O muxed with XTAL2 external oscillator drive (analog output for crystal/resonator, digital input for CMOS/capacitor/RC oscillator configurations).
32 P0.2/XTAL1 bidirectional Port 0.2 digital I/O muxed with XTAL1 external oscillator return (analog input for crystal or resonator).

Key specifications

Parameter Value
Manufacturer SKYWORKS SILICON LABS
Package LQFP-32(7x7)
Category MCU
Pins 32

Ordering variants

Same part, different packaging or reel option.

  • C8051F310-GQR
  • C8051F310-GQRGM

CAD (KiCad official)

  • Symbol: C8051F310-GQR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: c8051f310-gqr-etched.step / c8051f310-gqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c8051f310-gqr.step / c8051f310-gqr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
c8051f310-gqr.step 413 KB You want the bare part, or you mark your own boards.
c8051f310-gqr-etched.step 4.1 MB You want the part with C8051F310-GQR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 996 faces against 507 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SKYWORKS SILICON LABS datasheet (228 pp, sha256 09bdc805bdb99508, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF