Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

C3M0350120J

CREE · Silicon Carbide Field Effect Transistor (MOSFET) · TO-263-7

C3M0350120J from CREE, in a TO-263-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; recommended turn-on gate voltage is 15 V (±5% regulation), operational VGS -4/15 V static, with transient maximum -8/+19 V.
2 KS passive Driver source (Kelvin source) pin for the gate drive return, which reduces switching losses and minimizes gate ringing.
3 S passive Power source pin, connected in parallel with pins 4, 5, 6 and 7 for the main current path.
4 S passive Power source pin, connected in parallel with pins 3, 5, 6 and 7 for the main current path.
5 S passive Power source pin, connected in parallel with pins 3, 4, 6 and 7 for the main current path.
6 S passive Power source pin, connected in parallel with pins 3, 4, 5 and 7 for the main current path.
7 S passive Power source pin, connected in parallel with pins 3, 4, 5 and 6 for the main current path.
8 D passive Drain (tab) with 1200 V maximum drain-source voltage and 7.2 A continuous drain current at TC = 25 °C.

Key specifications

Parameter Value
Manufacturer CREE
Package TO-263-7
Category Silicon Carbide (SiC) Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 1200 V TC = 25 °C 1
Maximum Gate-Source Voltage (transient) VGS(max) -8 19 V Transient 1
Operational Gate-Source Voltage VGS op -4 15 V Static; Note 1 1
DC Continuous Drain Current ID 7.2 A VGS = 15 V, TC = 25 °C, TJ ≤150 °C; Fig. 19 1
DC Continuous Drain Current ID 5 A VGS = 15 V, TC = 100 °C, TJ ≤150 °C; Note 2 1
Pulsed Drain Current IDM 20 A tP max limited by Tjmax; VGS = 15 V, TC = 25 °C; Fig. 22 1
Power Dissipation PD 40.8 W TC = 25 °C, TJ = 150 °C; Fig. 20 1
Operating Junction and Storage Temperature TJ, Tstg -55 150 °C 1
Solder Temperature TL 260 °C According to JEDEC J-STD-020 1
Gate Threshold Voltage VGS(th) 1.8 2.5 3.6 V VDS = VGS, ID = 1 mA; Fig. 11 2
Zero Gate Voltage Drain Current IDSS 1 50 µA VDS = 1200 V, VGS = 0 V 2
Gate-Source Leakage Current IGSS 10 250 nA VGS = 15 V, VDS = 0 V 2
Drain-Source On-State Resistance RDS(on) 350 455 mΩ VGS = 15 V, ID = 3.6 A; Fig. 4, 5, 6 2
Continuous Diode Forward Current IS 7.3 A VGS = -4 V 2
Diode Pulse Current IS, pulsed 20 A VGS = -4 V, pulse width tP limited by Tj max 2
Thermal Resistance from Junction to Case RθJC 2.9 °C/W Fig. 21 2

CAD (KiCad official)

  • Symbol: C3M0350120J
  • Footprint: Package_TO_SOT_SMD:TO-263-7_TabPin8
  • 3D model: TO-263-7 (KiCad packages3D, STEP)
  • 3D model files: c3m0350120j-etched.step / c3m0350120j-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c3m0350120j.step / c3m0350120j.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CREE datasheet (11 pp, sha256 d6f331346d185944, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF