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BUF634AIDR

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Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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BUF634AIDR

Texas Instruments · Operational Amplifier · SOIC-8

BUF634AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BW input Bandwidth adjustment input; connect to V- pin for wide-bandwidth mode (210 MHz) or leave floating for low-quiescent current mode (35 MHz).
2 NC unconnected No internal connection.
3 VIN power_in Signal input; accepts linear input voltage range of -13 V to +13 V at RL = 1 kΩ.
4 V- power_in Negative power supply; operating range ±2.25 V to ±18 V total supply voltage.
5 NC unconnected No internal connection.
6 VO output Output; delivers up to ±250 mA continuous output current with output voltage swing from 1.6 V to 2.5 V from supplies depending on output current.
7 V+ power_in Positive power supply; operating range ±2.25 V to ±18 V total supply voltage.
8 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS = (V+) – (V–) VS 40 V printed as 40 (±20) 4
Input voltage VIN -0.5 0.5 V printed as VS ± 0.5 V 4
Operating ambient temperature TA -40 125 °C 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage (recommended) VS 2.25 15 18 V printed as ±2.25 / ±15 / ±18 V 4
Ambient temperature (recommended) TA -40 25 125 °C limited by RθJA and TJ,Max for safe operation (footnote 1) 4
Input offset voltage (Wide-BW mode) VOS 36 65 mV TA = 25℃ 5
Input bias current (Wide-BW mode) IB 0.25 2 µA VIN = 0 V 5
Gain (Wide-BW mode), RL = 1 kΩ G 0.95 0.99 V/V VO = ±10 V, RL = 1 kΩ 5
Gain (Wide-BW mode), RL = 100 Ω G 0.93 0.95 V/V VO = ±10 V, RL = 100 Ω 5
Gain (Wide-BW mode), RL = 67 Ω G 0.91 0.93 V/V VO = ±10 V, RL = 67 Ω 5
Linear input voltage range (Wide-BW mode) -13 13 V RL = 1 kΩ, IB < 10 µA 5
Output headroom to supplies (Wide-BW mode) 1.6 1.8 V IO = ±10 mA 5
Output headroom to supplies (Wide-BW mode) 2 2.2 V IO = ±100 mA 5
Output headroom to supplies (Wide-BW mode) 2.2 2.5 V IO = ±150 mA 5
Short-circuit current (Wide-BW mode) ISC 375 550 mA 5
Operating voltage range (Wide-BW mode) VS 2.25 18 V printed as ±2.25 / ±18 V 5
Quiescent current (Wide-BW mode) IQ 8.5 12 mA IO = 0 mA 5
Power-supply rejection ratio (Wide-BW mode) PSRR 64 75 dB VS = ±2.25 V to ±18 V 5
Input offset voltage (Low-IQ mode) VOS 36 65 mV TA = 25℃ 6
Input bias current (Low-IQ mode) IB 0.03 0.25 µA VIN = 0 V 6
Gain (Low-IQ mode), RL = 1 kΩ G 0.95 0.99 V/V VO = ±10 V, RL = 1 kΩ 6
Gain (Low-IQ mode), RL = 100 Ω G 0.93 0.95 V/V VO = ±10 V, RL = 100 Ω 6
Gain (Low-IQ mode), RL = 67 Ω G 0.91 0.93 V/V VO = ±10 V, RL = 67 Ω 6
Linear input voltage range (Low-IQ mode) -13 13 V RL = 1 kΩ, IB < 10 µA 6
Output headroom to supplies (Low-IQ mode) 1.6 1.8 V IO = ±10 mA 6
Output headroom to supplies (Low-IQ mode) 2 2.2 V IO = ±100 mA 6
Output headroom to supplies (Low-IQ mode) 2.2 2.5 V IO = ±150 mA 6
Short-circuit current (Low-IQ mode) ISC 350 550 mA 6
Operating voltage range (Low-IQ mode) VS 2.25 18 V printed as ±2.25 / ±18 V 6
Quiescent current (Low-IQ mode) IQ 1.5 2.3 mA IO = 0 6
Power-supply rejection ratio (Low-IQ mode) PSRR 64 80 dB VS = ±2.25 V to ±18 V 6
Junction-to-ambient thermal resistance (D SOIC) RθJA 122.9 °C/W D (SOIC) package, 8 pins 4
Junction-to-case (top) thermal resistance (D SOIC) RθJC(top) 55.2 °C/W D (SOIC) package, 8 pins 4
Junction-to-board thermal resistance (D SOIC) RθJB 68.4 °C/W D (SOIC) package, 8 pins 4
Junction-to-top characterization parameter (D SOIC) ΨJT 12.1 °C/W D (SOIC) package, 8 pins 4
Junction-to-board characterization parameter (D SOIC) ΨJB 67.2 °C/W D (SOIC) package, 8 pins 4

CAD (KiCad official)

  • Symbol: BUF634AIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: buf634aidr-etched.step / buf634aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); buf634aidr.step / buf634aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 556148100a323c7c, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF