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BU9873FJ-GTE2

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ROHM Semicon Real-time Clocks (RTC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BU9873FJ-GTE2

ROHM Semicon · Real-time Clocks (RTC) · SOIC-8

BU9873FJ-GTE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 32KOUT output The 32KOUT pin outputs a 32.768 kHz clock pulse under internal register control, is enabled from power-on at 0V, and is a CMOS push-pull output.
2 SCL input The SCL pin inputs the clock pulses that synchronize data transfer on the SDA pin.
3 SDA bidirectional The SDA pin inputs and outputs data for writing and reading, synchronized with SCL, and is an N-channel open-drain output.
4 VSS power_in The VSS pin is the ground connection.
5 INTRB output The INTRB pin outputs periodic or alarm interrupts (Alarm_A, Alarm_B) to the CPU, is disabled during power-on from 0V, and is an N-channel open-drain output.
6 OSCOUT passive The OSCOUT pin connects to the 32.768 kHz crystal oscillator, as all other oscillation circuit components are integrated in the IC.
7 OSCIN passive The OSCIN pin connects to the 32.768 kHz crystal oscillator, as all other oscillation circuit components are integrated in the IC.
8 VDD power_in The VDD pin is the power supply connection, with a supply voltage of 1.8 to 5.5 V under operating conditions.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOIC-8
Category Clock and Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD -0.3 6.5 V 4
Terminal Voltage -0.3 V Max is VDD+0.3V and not over 6.5V; min not lower than -0.8V when pulse width is 50ns or less 4
Storage Temperature Tstg -55 125 °C 4
Operating Temperature Topt -40 85 °C 4
Power Dissipation (SOP-J8) Pd 0.45 W When using above Ta=25, decreased by 4.5mW/°C 4
Supply Voltage VDD 1.8 5.5 V 4
Timekeeping Voltage VCLK 1.45 5.5 V For minimum time keeping voltage, CGOUT=CDOUT=0pF; CL=6pF to 12.5pF; max R1=80kΩ 4
Input Voltage VIN 0 V Max is VDD 4
“H” Output Current IOH -0.5 mA 32KOUT; VOH=VDD-0.5V 5
“L” Output Current1 IOL1 1 mA INTRB, 32KOUT; VOL1=0.4V 5
“L” Output Current2 IOL2 6 mA SDA; VOL2=0.4V 5
Input Leakage Current IILK -1 1 μA SCL; VIN=5.5V or VSS, VDD=5.5V 5
Output Off State Leakage Current IOZ -1 1 μA SDA, INTRB, 32KOUT; VOUT=5.5V or VSS, VDD=5.5V 5
Standby Current (time keeping current) IDD1 0.4 0.6 μA VDD=3V, Topt=25°C, SCL, SDA=3V, CGOUT=CDOUT=0pF, Output=Open(Note1) 5
Standby Current (time keeping current) IDD2 1 μA VDD=3V, Topt=-40°C to +85°C, SCL, SDA=3V, CGOUT=CDOUT=0pF, Output=Open(Note1) 5
Standby Current (time keeping current) IDD3 1.35 μA VDD=5.5V, Topt=-40°C to +85°C, SCL, SDA=5.5V, CGOUT=CDOUT=0pF, Output=Open(Note1) 5
SCL Clock Frequency fSCL 100 kHz VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SCL Clock Frequency fSCL 400 kHz VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
SCL Clock “L” Time tLOW 4.7 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SCL Clock “L” Time tLOW 1.3 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
SCL Clock “H” Time tHIGH 4 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SCL Clock “H” Time tHIGH 0.6 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
Start Condition Hold Time tHD:STA 4 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
Start Condition Hold Time tHD:STA 0.6 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
Stop Condition Setup Time tSU:STO 4 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
Stop Condition Setup Time tSU:STO 0.6 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
Start Condition Setup Time tSU:STA 4.7 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
Start Condition Setup Time tSU:STA 0.6 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
Data Setup Time tSU:DAT 250 ns VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
Data Setup Time tSU:DAT 100 ns VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
“H” Data Hold Time tHDH:DAT 0 ns VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
“L” Data Hold Time tHDL:DAT 35 ns VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SDA “L” Stable Time After Falling of SCL tPL:DAT 2 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SDA “L” Stable Time After Falling of SCL tPL:DAT 0.9 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
SDA Off Stable Time After Falling of SCL tPZ:DAT 2 μs VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
SDA Off Stable Time After Falling of SCL tPZ:DAT 0.9 μs VDD≥2.5V; VSS=0V, Topt=-40°C to +85°C 6
Rising Time of SCL and SDA (Input) tR 1000 ns VDD≥1.8V; Not 100% TESTED; VSS=0V, Topt=-40°C to +85°C 6
Rising Time of SCL and SDA (Input) tR 300 ns VDD≥2.5V; Not 100% TESTED; VSS=0V, Topt=-40°C to +85°C 6
Falling Time of SCL and SDA (Input) tF 300 ns VDD≥1.8V; Not 100% TESTED; VSS=0V, Topt=-40°C to +85°C 6
Spike Width that can be Filtered tSP 50 ns VDD≥1.8V; VSS=0V, Topt=-40°C to +85°C 6
Internal Oscillation Capacitance 1 CG 10 pF OSCIN 5
Internal Oscillation Capacitance 2 CD 10 pF OSCOUT 5

CAD (KiCad official)

  • Symbol: BU9873FJ-GTE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: bu9873fj-gte2-etched.step / bu9873fj-gte2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bu9873fj-gte2.step / bu9873fj-gte2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (40 pp, sha256 3f85caedc14fe3fa, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF