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Ray bts723gw: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 6091238 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "bts723gw",
  "title": "BTS723GW",
  "brief": "Infineon AC-DC Controllers and Regulators, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "pmic",
    "bts723gw"
  ],
  "component": {
    "mpn": "BTS723GW",
    "manufacturer": "Infineon",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "PMIC",
    "subcategory": "AC-DC Controllers and Regulators",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/2d1d294e22a1f4022c2662469498bdb5.pdf",
    "parts": {
      "symbol": "bts723gw.kicad_sym",
      "footprint": "bts723gw.kicad_mod",
      "model_3d": "bts723gw-etched.glb",
      "model_3d_plain": "bts723gw.glb",
      "model_3d_step": "bts723gw-etched.step",
      "model_3d_step_plain": "bts723gw.step",
      "lbr": "bts723gw.lbr"
    },
    "distributor_links": {
      "lcsc": "C67625"
    },
    "pins": [
      {
        "number": "1",
        "name": "Vbb",
        "type": "power_in",
        "description": "Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Multiple Vbb pins (1, 7, 8, 14) share the leadframe; wire for max simultaneous short-circuit currents from both channels and low thermal resistance."
      },
      {
        "number": "2",
        "name": "IN1",
        "type": "input",
        "description": "Input for channel 1: activates channel 1 on logic-high signal. CMOS-compatible, ground-referenced with integrated 20 kΩ input series resistor. Absolute max input voltage ±42 V DC; max input current ±2.0 mA DC."
      },
      {
        "number": "3",
        "name": "ST1",
        "type": "output",
        "description": "Diagnostic feedback for channel 1: open-drain status output. Integrated pull-up via SPU pin; reports open-load (OFF state) and thermal shutdown (ON state). Max status current ±2.0 mA DC."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Logic ground. Independent from load ground. External current-limit resistor (150 Ω recommended) advised for Vbb > Vbb(AZ)."
      },
      {
        "number": "5",
        "name": "ST2",
        "type": "output",
        "description": "Diagnostic feedback for channel 2: open-drain status output. Integrated pull-up via SPU pin; reports open-load (OFF state) and thermal shutdown (ON state). Max status current ±2.0 mA DC."
      },
      {
        "number": "6",
        "name": "IN2",
        "type": "input",
        "description": "Input for channel 2: activates channel 2 on logic-high signal. CMOS-compatible, ground-referenced with integrated 20 kΩ input series resistor. Absolute max input voltage ±42 V DC; max input current ±2.0 mA DC."
      },
      {
        "number": "7",
        "name": "Vbb",
        "type": "power_in",
        "description": "Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 8, 14."
      },
      {
        "number": "8",
        "name": "Vbb",
        "type": "power_in",
        "description": "Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 7, 14."
      },
      {
        "number": "9",
        "name": "OUT2",
        "type": "power_out",
        "description": "Protected high-side power output of channel 2. On-state resistance ~90 mΩ typ (each channel, Tj=25°C); nominal load current 2.9 A (one channel active); current limitation 8 A. Pins 9 and 10 must be connected in parallel for spec operation."
      },
      {
        "number": "10",
        "name": "OUT2",
        "type": "power_out",
        "description": "Protected high-side power output of channel 2 (parallel with pin 9). Must be tied to pin 9."
      },
      {
        "number": "11",
        "name": "SPU",
        "type": "input",
        "description": "Status Pull-Up: connection for external pull-up voltage source (max ±42 V DC) for the open-drain ST1/ST2 status outputs. Pull-up resistors (~12 kΩ / 850 Ω network) are integrated internally."
      },
      {
        "number": "12",
        "name": "OUT1",
        "type": "power_out",
        "description": "Protected high-side power output of channel 1. On-state resistance ~90 mΩ typ (each channel, Tj=25°C); nominal load current 2.9 A (one channel active); current limitation 8 A. Pins 12 and 13 must be connected in parallel for spec operation."
      },
      {
        "number": "13",
        "name": "OUT1",
        "type": "power_out",
        "description": "Protected high-side power output of channel 1 (parallel with pin 12). Must be tied to pin 12."
      },
      {
        "number": "14",
        "name": "Vbb",
        "type": "power_in",
        "description": "Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 7, 8."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/2d1d294e22a1f4022c2662469498bdb5.pdf",
        "pages": 17,
        "sha256": "f58f7d4d2be7bf12",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -3.81
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "bts723gw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "bts723gw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "a7318b0e8f16d1569cc299ce32455f7f1a5479d35d5bded4f3dfe94e98caae24",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Infineon",
      "Package": "SOIC-14",
      "Category": "PMIC",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "bts723gw"
  ],
  "discovery_pitch": "BTS723GW (Infineon) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "bts723gw.kicad_sym",
    "bts723gw.kicad_mod",
    "bts723gw.glb",
    "bts723gw.step",
    "bts723gw-etched.step",
    "bts723gw.lbr",
    "docs/hero.png",
    "docs/bts723gw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:15:43.906Z"
}