component
BTS4175SGA
Public Made by Adomby adom
Infineon Technologies Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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BTS4175SGA
Infineon Technologies · Power Distribution Switches · SOIC-8
BTS4175SGA from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection for the device logic; the logic ground is independent from the load ground, and the device turns OFF or stays OFF on loss of module ground regardless of the IN voltage. |
| 2 | IN | input | CMOS-compatible channel input that switches the channel ON on a logic high level; the input pin is rated for -10 V to 16 V and ±5 mA through the input pins. |
| 3 | OUT | output | Protected high-side power output that drives the load; the drain-source clamp limits the negative output voltage to VS - VDS(AZ) (59 V to 63 V) and the load current is limited to IL(LIM) during overload. |
| 4 | ST | output | Diagnostic feedback of channel status as an active-low open-drain output that requires an external pull-up (a suggested 15 kΩ) to the logic supply and is zener-limited to 5.4 V to 6.1 V when high. |
| 5 | VS | power_in | Battery voltage supply pin (operating range 6 V to 52 V); the wiring should be designed for the simultaneous maximum short-circuit current and for low thermal resistance. |
| 6 | VS | power_in | Battery voltage supply pin (operating range 6 V to 52 V); the wiring should be designed for the simultaneous maximum short-circuit current and for low thermal resistance. |
| 7 | VS | power_in | Battery voltage supply pin (operating range 6 V to 52 V); the wiring should be designed for the simultaneous maximum short-circuit current and for low thermal resistance. |
| 8 | VS | power_in | Battery voltage supply pin (operating range 6 V to 52 V); the wiring should be designed for the simultaneous maximum short-circuit current and for low thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VS | 52 | V | 8 | |||
| Reverse polarity voltage | -VS(REV) | 0 | 52 | V | 8 | ||
| Supply voltage for short circuit protection | Vbat(SC) | 0 | 36 | V | RECU = 20mΩ, RCable=16mΩ/m, LCable=1µH/m, l = 0 or 5m | 8 | |
| Voltage at INPUT pins | VIN | -10 | 16 | V | 8 | ||
| Current through INPUT pins | IIN | -5 | 5 | mA | 8 | ||
| Power dissipation (DC) | PTOT | 1.5 | W | TA=85°C, Tj <150°C | 8 | ||
| Inductive load switch off energy dissipation, single pulse | EAS | 125 | mJ | Tj =150°C, VS=13.5V, IL = 1A | 8 | ||
| Junction temperature | Tj | -40 | 150 | °C | 8 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 8 | ||
| ESD resistivity IN pin (HBM) | VESD | -1 | 1 | kV | HBM | 8 | |
| ESD resistivity all other pins (HBM) | VESD | -5 | 5 | kV | HBM | 8 | |
| Operating voltage | VSOP | 6 | 52 | V | VIN = 4.5V, RL = 47Ω, VDS < 0.5V | 9 | |
| Undervoltage shutdown | VSUV | 5.5 | V | 9 | |||
| Operating current | IGND | 2 | mA | VIN = 5V | 9 | ||
| Standby current for whole device with load | IS(OFF) | 15 | µA | Tj <85°C | 9 | ||
| Standby current for whole device with load | IS(OFF) | 18 | µA | Tj = 150°C, RL = 47Ω, VIN = 0V | 9 | ||
| Junction to soldering point | RthJS | 15 | K/W | 9 | |||
| ON-state resistance per channel | RDS(ON) | 280 | 350 | mΩ | Tj =150°C | 13 | |
| Nominal load current | IL(nom) | 1.3 | A | TA=85°C, Tj <150°C | 13 | ||
| Drain to source clamping voltage | VDS(AZ) | 59 | 63 | V | IDS = 4mA | 13 | |
| Output leakage current | IL(OFF) | 5 | µA | VIN=0V | 13 | ||
| Slew rate ON | dV/dtON | 0.7 | 2 | V/µs | RL=47Ω, Vs=13.5V | 13 | |
| Slew rate OFF | -dV/dtOFF | 0.9 | 2 | V/µs | 13 | ||
| Turn-ON time to 90% VS | tON | 80 | 180 | µs | Includes propagation delay | 13 | |
| Turn-OFF time to 10% VS | tOFF | 80 | 200 | µs | Includes propagation delay | 13 | |
| Over voltage protection | VS(AZ) | 62 | V | Is = 4mA | 17 | ||
| Initial peak short circuit current limit (pin 5 to 3) | IL(LIM) | 4 | A | VS = 20V; tm = 150µs; Tj = -40°C | 17 | ||
| Initial peak short circuit current limit (pin 5 to 3) | IL(LIM) | 9 | A | VS = 20V; tm = 150µs; Tj = 150°C | 17 | ||
| Thermal shutdown temperature | TjSC | 150 | °C | 17 | |||
| Open load detection threshold in OFF state | VOL(OFF) | 3 | 4 | V | VIN = 0V | 21 | |
| Status output (open drain) high level; Zener limit voltage | VST(HIGH) | 5.4 | 6.1 | V | IST = +1,6mA | 21 | |
| Status output (open drain) low level | VST(LOW) | 0.6 | V | IST = +1,6mA | 21 | ||
| Status invalid after positive input slope | tdST(+) | 120 | 160 | µs | 21 | ||
| Status invalid after negative input slope | tdST(-) | 250 | 400 | µs | 21 | ||
| Low level input voltage | VIN(L) | 0.8 | V | 22 | |||
| High level input voltage | VIN(H) | 2.2 | V | 22 | |||
| Low level input current | IIN(L) | 1 | 25 | µA | VIN= 0,7V | 22 | |
| High level input current | IIN(H) | 3 | 25 | µA | VIN= 5V | 22 | |
| Input resistance | RI | 2 | 3.5 | 5 | kΩ | See Figure 16 | 22 |
| ON-state resistance per channel | RDS(ON) | 175 | mΩ | Tj =25°C, IL = 1A, VIN= 5V, See Figure 4 | 13 | ||
| Drain source diode voltage during reverse polarity | -VDS(REV) | 600 | mV | TJ = 150°C, VOUT > VS | 17 | ||
| Repetitive short circuit current limitation | IL(SCR) | 6.5 | A | VS < 40V | 17 | ||
| Repetitive short circuit current limitation | IL(SCR) | 4.5 | A | VS > 40V | 17 | ||
| Initial peak short circuit current limit (pin 5 to 3) | IL(LIM) | 6.5 | A | VS = 20V; tm = 150µs; Tj = 25°C | 17 | ||
| Thermal shutdown hysteresis | ΔTJT | 10 | K | 17 | |||
| Short circuit detection voltage | VOUT(SC) | 2.8 | V | 21 | |||
| Internal output pull down | RPD | 200 | kΩ | VOUT(OL) = 4V | 13 | ||
| Input voltage hysteresis | VIN(HYS) | 0.4 | V | 22 | |||
| Junction to ambient, channel active | RthJA | 83 | K/W | with 6cm² cooling area | 9 |
CAD (KiCad official)
- Symbol:
BTS4175SGA - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
bts4175sga-etched.step/bts4175sga-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bts4175sga.step/bts4175sga.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (26 pp, sha256
b1c3201c62ad4bf4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).