component
BTA201-800ER
Public Made by Adomby adom
WeEn Semiconductors TRIACs, TO-92. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBTA201-800ER
WeEn Semiconductors · TRIACs · TO-92
BTA201-800ER from WeEn Semiconductors, in a TO-92. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T1 | passive | Main terminal 1 of the triac, rated for the 800 V repetitive peak off-state voltage (VDRM) and 1 A RMS on-state current (IT(RMS)) given in the limiting values. |
| 2 | G | input | Gate terminal used to trigger the triac, with peak gate current IGM limited to 2 A, peak gate power PGM to 5 W and average gate power PG(AV) to 0.1 W over any 20 ms period. |
| 3 | T2 | passive | Main terminal 2 of the triac, the terminal referenced in the gate trigger quadrants (T2+ and T2-) of the characteristics table, rated with the same 800 V VDRM and 1 A IT(RMS) limits. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WeEn Semiconductors |
| Package | TO-92 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Repetitive peak off-state voltage | VDRM | 800 | V | 3 | |||
| RMS on-state current | IT(RMS) | 1 | A | full sine wave; Tlead ≤ 54 °C; Fig. 1; Fig. 2; Fig. 3 | 3 | ||
| Non-repetitive peak on-state current | ITSM | 13.7 | A | full sine wave; Tj(init) = 25 °C; tp = 16.8 ms | 3 | ||
| Non-repetitive peak on-state current | ITSM | 12.5 | A | full sine wave; Tj(init) = 25 °C; tp = 20 ms; Fig. 4; Fig. 5 | 3 | ||
| I2t for fusing | I2t | 0.78 | A²s | tp = 10 ms; SIN | 3 | ||
| Rate of rise of on-state current | dIT/dt | 100 | A/µs | IG = 0.2 A | 3 | ||
| Peak gate current | IGM | 2 | A | 3 | |||
| Peak gate power | PGM | 5 | W | 3 | |||
| Average gate power | PG(AV) | 0.1 | W | over any 20 ms period | 3 | ||
| Junction temperature | Tj | -40 | 125 | °C | 3 | ||
| Thermal resistance junction to lead | Rth(j-lead) | 60 | K/W | full cycle; Fig. 6 | 6 | ||
| Thermal resistance junction to lead | Rth(j-lead) | 80 | K/W | half cycle; Fig. 6 | 6 | ||
| Gate trigger current (T2+ G+) | IGT | 1 | 10 | mA | VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 °C; Fig. 7 | 7 | |
| Gate trigger current (T2+ G-) | IGT | 1 | 10 | mA | VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 °C; Fig. 7 | 7 | |
| Gate trigger current (T2- G-) | IGT | 1 | 10 | mA | VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 °C; Fig. 7 | 7 | |
| Latching current (T2+ G+) | IL | 12 | mA | VD = 12 V; IG = 0.1 A; T2+ G+; Tj = 25 °C; Fig. 8 | 7 | ||
| Latching current (T2+ G-) | IL | 20 | mA | VD = 12 V; IG = 0.1 A; T2+ G-; Tj = 25 °C; Fig. 8 | 7 | ||
| Latching current (T2- G-) | IL | 12 | mA | VD = 12 V; IG = 0.1 A; T2- G-; Tj = 25 °C; Fig. 8 | 7 | ||
| Holding current | IH | 12 | mA | VD = 12 V; Tj = 25 °C; Fig. 9 | 7 | ||
| On-state voltage | VT | 1.2 | 1.5 | V | IT = 1.4 A; Tj = 25 °C; Fig. 10 | 7 | |
| Gate trigger voltage | VGT | 0.7 | 1 | V | VD = 12 V; IT = 0.1 A; Tj = 25 °C; Fig. 11 | 7 | |
| Gate trigger voltage at high temperature | VGT | 0.2 | 0.3 | V | VD = 400 V; IT = 0.1 A; Tj = 125 °C; Fig. 11 | 7 | |
| Off-state current | ID | 0.1 | 0.5 | mA | VD = 800 V; Tj = 125 °C | 7 | |
| Rate of rise of off-state voltage | dVD/dt | 600 | V/µs | VDM = 536 V; Tj = 125 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit; Fig. 12 | 7 | ||
| Rate of change of commutating current | dIcom/dt | 2.5 | A/ms | VD = 400 V; Tj = 125 °C; IT(RMS) = 1 A; dVcom/dt = 20 V/s; (snubberless condition); gate open circuit | 7 | ||
| Rate of change of commutating current | dIcom/dt | 3.5 | A/ms | VD = 400 V; Tj = 125 °C; IT(RMS) = 1 A; dVcom/dt = 10 V/µs; gate open circuit | 7 | ||
| Thermal resistance junction to ambient (free air) | Rth(j-a) | 150 | K/W | 6 |
CAD (KiCad official)
- Symbol:
BTA201-800ER - Footprint:
Package_TO_SOT_THT:TO-92_Inline - 3D model: TO-92 (KiCad packages3D, STEP)
- 3D model files:
bta201-800er-etched.step/bta201-800er-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bta201-800er.step/bta201-800er.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WeEn Semiconductors datasheet (13 pp, sha256
352b1e64b4f3f0cc, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).