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BST23C082V

BORN · ESD And Surge Protection (TVS/ESD) · SOT-23

BST23C082V from BORN, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1 passive Protected line terminal of a bidirectional ESD diode (VRWM 8V, VBR 9-12V at 1mA, 40-45pF to Pin 3 at 0V, 1MHz).
2 2 passive Second protected line terminal of a bidirectional ESD diode (VRWM 8V, VC 18V max at IPP=15A 8/20μs, 40-45pF to Pin 3).
3 3 passive Common terminal of the array; Pin 1 and Pin 2 are each referenced to Pin 3 for junction capacitance (schematic shows pins 1 and 3, and pins 2 and 3 as diode pairs).

Key specifications

Parameter Value
Manufacturer BORN
Package SOT-23
Category Circuit Protection
Pins 3

CAD (KiCad official)

  • Symbol: BST23C082V
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: bst23c082v-etched.step / bst23c082v-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bst23c082v.step / bst23c082v.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BORN datasheet (4 pp, sha256 790de1b5453d0f6a, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF