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BR93G86FJ-3AGTE2

Public Made by Adom

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ROHM Semicon Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BR93G86FJ-3AGTE2

ROHM Semicon · Pre-ordered Chips · SOIC-8

BR93G86FJ-3AGTE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip select input.
2 SK input Serial clock input; DI is sampled on the rising edge of SK and DO changes on the rising edge of SK.
3 DI input Start bit, op code, address and serial data input.
4 DO output Serial data output and READY/BUSY status display output; High-Z while CS is low.
5 GND power_in Ground, the 0V reference voltage for all inputs and outputs.
6 NC unconnected No-connect pin in the 'A' pin assignment (replaces ORG, so the part has no organization select pin).
7 DU unconnected Don't-use terminal; may be set to high, low or left open.
8 VCC power_in Supply voltage, 1.7V to 5.5V recommended operating range (absolute maximum -0.3 to +6.5V).

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.3 6.5 V 2
Permissible dissipation (SOP-J8) Pd 0.45 W Ta=25°C or higher: 4.5mW to be reduced per 1°C 2
Storage temperature Tstg -65 150 °C 2
Operating temperature Topr -40 85 °C 2
Input/Output voltage -0.3 V Max is Vcc+1.0, not over 6.5V; min -0.8V for pulse width 50ns or less 2
Junction temperature Tjmax 150 °C Junction temperature at the storage condition 2
Write cycles 1e+06 Times Ta=25°C, VCC=1.7~5.5V, not 100% tested 2
Data retention 40 Years Ta=25°C, VCC=1.7~5.5V, not 100% tested 2
Supply voltage (recommended) VCC 1.7 5.5 V 2
Input low voltage VIL -0.3 V 1.7V≤VCC≤5.5V; max is 0.3VCC; min -0.8V for pulse width 50ns or less 3
Output low voltage 1 VOL1 0 0.4 V IOL=2.1mA, 2.7V≤VCC≤5.5V 3
Output low voltage 2 VOL2 0 0.2 V IOL=100μA 3
Output high voltage 1 VOH1 2.4 V IOH=-0.4mA, 2.7V≤VCC≤5.5V; max is VCC 3
Input leakage current 1 ILI1 -1 1 µA VIN=0V~VCC (CS,SK,DI) 3
Input leakage current 2 ILI2 -1 3 µA VIN=0V~VCC (ORG) 3
Output leakage current ILO -1 1 µA VOUT=0V~VCC, CS=0V 3
Supply current (WRITE) 1.7V ICC1 1 mA VCC=1.7V, fSK=1MHz, tE/W=5ms (WRITE) 3
Supply current (WRITE) 5.5V ICC1 2 mA VCC=5.5V, fSK=3MHz, tE/W=5ms (WRITE) 3
Supply current (READ) 1MHz ICC2 0.5 mA fSK=1MHz (READ) 3
Supply current (READ) 3MHz ICC2 1 mA fSK=3MHz (READ) 3
Supply current (WRAL, ERAL) 2.5V ICC3 2 mA VCC=2.5V, fSK=1MHz, tE/W=5ms (WRAL, ERAL) 3
Supply current (WRAL, ERAL) 5.5V ICC3 3 mA VCC=5.5V, fSK=3MHz, tE/W=5ms (WRAL, ERAL) 3
Standby current 1 ISB1 2 µA CS=0V, ORG=VCC or OPEN 3
Standby current 2 ISB2 15 µA CS=0V, ORG=0V 3
SK frequency fSK 3 MHz VCC=4.5~5.5V 4
SK high time tSKH 100 ns VCC=4.5~5.5V 4
SK low time tSKL 100 ns VCC=4.5~5.5V 4
CS low time tCS 200 ns VCC=4.5~5.5V 4
CS setup time tCSS 50 ns VCC=4.5~5.5V 4
DI setup time tDIS 50 ns VCC=4.5~5.5V 4
CS hold time tCSH 0 ns VCC=4.5~5.5V 4
DI hold time tDIH 50 ns VCC=4.5~5.5V 4
Data 1 output delay tPD1 200 ns VCC=4.5~5.5V 4
Data 0 output delay tPD0 200 ns VCC=4.5~5.5V 4
Time from CS to output establishment tSV 150 ns VCC=4.5~5.5V 4
Time from CS to High-Z tDF 100 ns VCC=4.5~5.5V 4
Write cycle time tE/W 5 ms VCC=4.5~5.5V 4
SK frequency fSK 2 MHz VCC=2.5~4.5V 4
SK high time tSKH 230 ns VCC=2.5~4.5V 4
SK low time tSKL 200 ns VCC=2.5~4.5V 4
DI setup time tDIS 100 ns VCC=2.5~4.5V 4
DI hold time tDIH 100 ns VCC=2.5~4.5V 4
SK frequency fSK 1 MHz VCC=1.7~2.5V 4
SK high time tSKH 250 ns VCC=1.7~2.5V 4
SK low time tSKL 250 ns VCC=1.7~2.5V 4
CS low time tCS 250 ns VCC=1.7~2.5V 4
CS setup time tCSS 200 ns VCC=1.7~2.5V 4
Data 1 output delay tPD1 400 ns VCC=1.7~2.5V 4
Data 0 output delay tPD0 400 ns VCC=1.7~2.5V 4
Time from CS to output establishment tSV 400 ns VCC=1.7~2.5V 4
Time from CS to High-Z tDF 200 ns VCC=1.7~2.5V 4

CAD (KiCad official)

  • Symbol: BR93G86FJ-3AGTE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: br93g86fj-3agte2-etched.step / br93g86fj-3agte2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br93g86fj-3agte2.step / br93g86fj-3agte2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (39 pp, sha256 0e8b9d7b696d6da4, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF