# BR93G76F-3BGTE2

**ROHM Semicon** · Pre-ordered Chips · SOP-8

BR93G76F-3BGTE2 from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DU | unconnected | Don't use terminal; may be set to high, low, or left open. |
| 2 | VCC | power_in | Supply voltage, 1.7 to 5.5V recommended operating range. |
| 3 | CS | input | Chip select input. |
| 4 | SK | input | Serial clock input; data is taken by DI in sync with the rise of SK. |
| 5 | DI | input | Start bit, op code, address, and serial data input. |
| 6 | DO | output | Serial data output and READY/BUSY status display output; High-Z while CS is low. |
| 7 | GND | power_in | All input/output reference voltage, 0V. |
| 8 | NC | unconnected | Non connected terminal; may be set to high, low, or left open. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 |  | 6.5 | V |  | 2 |
| Permissible dissipation (SOP8) | Pd |  |  | 450 | mW | Ta=25°C or higher: 4.5mW to be reduced per 1°C | 2 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 2 |
| Operating temperature | Topr | -40 |  | 85 | °C |  | 2 |
| Input voltage/Output voltage |  | -0.3 |  |  | V | Max is Vcc+1.0, not over 6.5V; min -0.8V if pulse width 50ns or less | 2 |
| Junction temperature | Tjmax |  |  | 150 | °C | Junction temperature at the storage condition | 2 |
| Supply voltage | VCC | 1.7 |  | 5.5 | V |  | 2 |
| Input voltage | VIN | 0 |  |  | V | 0 to VCC | 2 |
| Write cycles |  | 1e+06 |  |  | Times | Ta=25°C, VCC=1.7~5.5V | 2 |
| Data retention |  | 40 |  |  | Years | Ta=25°C, VCC=1.7~5.5V | 2 |
| Input low voltage | VIL | -0.3 |  |  | V | 1.7V≤VCC≤5.5V; max is 0.3VCC | 3 |
| Output low voltage 1 | VOL1 | 0 |  | 0.4 | V | IOL=2.1mA, 2.7V≤VCC≤5.5V | 3 |
| Output low voltage 2 | VOL2 | 0 |  | 0.2 | V | IOL=100μA | 3 |
| Output high voltage 1 | VOH1 | 2.4 |  |  | V | IOH=-0.4mA, 2.7V≤VCC≤5.5V; max is VCC | 3 |
| Input leakage current1 | ILI1 | -1 |  | 1 | µA | VIN=0V~VCC(CS,SK,DI) | 3 |
| Output leakage current | ILO | -1 |  | 1 | µA | VOUT=0V~VCC, CS=0V | 3 |
| Supply current (WRITE) | ICC1 |  |  | 1 | mA | VCC=1.7V, fSK=1MHz, tE/W=5ms (WRITE) | 3 |
| Supply current (WRITE) | ICC1 |  |  | 2 | mA | VCC=5.5V, fSK=3MHz, tE/W=5ms (WRITE) | 3 |
| Supply current (READ) | ICC2 |  |  | 0.5 | mA | fSK=1MHz (READ) | 3 |
| Supply current (READ) | ICC2 |  |  | 1 | mA | fSK=3MHz (READ) | 3 |
| Supply current (WRAL, ERAL) | ICC3 |  |  | 2 | mA | VCC=2.5V, fSK=1MHz, tE/W=5ms (WRAL, ERAL) | 3 |
| Supply current (WRAL, ERAL) | ICC3 |  |  | 3 | mA | VCC=5.5V, fSK=3MHz, tE/W=5ms (WRAL, ERAL) | 3 |
| Standby current | ISB1 |  |  | 2 | µA | CS=0V | 3 |
| SK frequency | fSK |  |  | 1 | MHz | VCC=1.7~2.5V | 4 |
| SK high time | tSKH | 250 |  |  | ns | VCC=1.7~2.5V | 4 |
| SK low time | tSKL | 250 |  |  | ns | VCC=1.7~2.5V | 4 |
| CS low time | tCS | 250 |  |  | ns | VCC=1.7~2.5V | 4 |
| CS setup time | tCSS | 200 |  |  | ns | VCC=1.7~2.5V | 4 |
| DI setup time | tDIS | 100 |  |  | ns | VCC=1.7~2.5V | 4 |
| DI hold time | tDIH | 100 |  |  | ns | VCC=1.7~2.5V | 4 |
| Data 1 output delay | tPD1 |  |  | 400 | ns | VCC=1.7~2.5V | 4 |
| Data 0 output delay | tPD0 |  |  | 400 | ns | VCC=1.7~2.5V | 4 |
| Time from CS to output establishment | tSV |  |  | 400 | ns | VCC=1.7~2.5V | 4 |
| Time from CS to High-Z | tDF |  |  | 200 | ns | VCC=1.7~2.5V | 4 |
| SK frequency | fSK |  |  | 2 | MHz | VCC=2.5~4.5V | 4 |
| SK high time | tSKH | 230 |  |  | ns | VCC=2.5~4.5V | 4 |
| SK low time | tSKL | 200 |  |  | ns | VCC=2.5~4.5V | 4 |
| CS low time | tCS | 200 |  |  | ns | VCC=2.5~4.5V | 4 |
| CS setup time | tCSS | 50 |  |  | ns | VCC=2.5~4.5V | 4 |
| Data 1 output delay | tPD1 |  |  | 200 | ns | VCC=2.5~4.5V | 4 |
| Data 0 output delay | tPD0 |  |  | 200 | ns | VCC=2.5~4.5V | 4 |
| Time from CS to output establishment | tSV |  |  | 150 | ns | VCC=2.5~4.5V | 4 |
| Time from CS to High-Z | tDF |  |  | 100 | ns | VCC=2.5~4.5V | 4 |
| SK frequency | fSK |  |  | 3 | MHz | VCC=4.5~5.5V | 4 |
| SK high time | tSKH | 100 |  |  | ns | VCC=4.5~5.5V | 4 |
| SK low time | tSKL | 100 |  |  | ns | VCC=4.5~5.5V | 4 |
| DI setup time | tDIS | 50 |  |  | ns | VCC=4.5~5.5V | 4 |
| DI hold time | tDIH | 50 |  |  | ns | VCC=4.5~5.5V | 4 |
| Write cycle time | tE/W |  |  | 5 | ms | VCC=4.5~5.5V | 4 |

## CAD (KiCad official)

- Symbol: `BR93G76F-3BGTE2`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `br93g76f-3bgte2-etched.step` / `br93g76f-3bgte2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `br93g76f-3bgte2.step` / `br93g76f-3bgte2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ROHM Semicon datasheet](docs/br93g76f-3bgte2-datasheet.pdf) (39 pp, sha256 `93349cbdb0b9a0f1`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/br93g76f-3bgte2-datasheet.pdf)