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BR25H512FJ-5ACE2

ROHM Semicon · EEPROM · SOIC-8

BR25H512FJ-5ACE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CSB input Chip select input.
2 SO output Serial data output; high impedance (High-Z) during HOLD status.
3 WPB input Write protect input; with WPEN = 1 and WPB Low, the Write Status Register command is disabled.
4 GND power_in All input/output reference voltage, 0 V.
5 SI input Serial data input.
6 SCK input Serial clock input; maximum clock frequency 20 MHz.
7 HOLDB input Hold input; set Low while SCK is Low to pause serial communication, High for normal communication.
8 VCC power_in Power supply, 1.7 V to 5.5 V operating range (absolute maximum -0.3 to +6.5 V).

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.3 6.5 V Ta = 25 °C 4
Terminal Voltage -0.3 V Ta = 25 °C; upper limit VCC+1.0, not over 6.5 V; -1.0 V min for pulse width 50 ns or less 4
Electro Static Discharge (HBM) VESD -3000 3000 V Ta = 25 °C 4
Maximum Output Low Current (SO) IOLMAX 10 mA Ta = 25 °C 4
Maximum Output HIGH Current (SO) IOHMAX -10 mA Ta = 25 °C 4
Maximum Junction Temperature Tjmax 150 °C 4
Storage Temperature Range Tstg -65 150 °C 4
Supply Voltage VCC 1.7 5.5 V 5
Ambient Operating Temperature Ta -40 125 °C 5
Bypass Capacitor C 0.1 μF Between VCC and GND 5
Input Capacitance CIN 8 pF Ta = 25 °C, f = 5 MHz, VIN = GND 5
Output Capacitance COUT 8 pF Ta = 25 °C, f = 5 MHz, VOUT = GND 5
Thermal Resistance Junction to Ambient (SOP-J8, 1s) θJA 149.3 °C/W 1s board, JESD51-3 4
Thermal Resistance Junction to Ambient (SOP-J8, 2s2p) θJA 76.9 °C/W 2s2p board, JESD51-7 4
Junction to Top Characterization Parameter (SOP-J8, 1s) ΨJT 18 °C/W 1s board 4
Junction to Top Characterization Parameter (SOP-J8, 2s2p) ΨJT 11 °C/W 2s2p board 4
Output Low Voltage 1 VOL1 0 0.4 V IOL = 3.0 mA, 2.5 V ≤ VCC ≤ 5.5 V 6
Output Low Voltage 2 VOL2 0 0.2 V IOL = 1.0 mA, 1.7 V ≤ VCC < 2.5 V 6
Input Leakage Current ILI -2 2 μA VIN = 0 V to Vcc 6
Output Leakage Current ILO -2 2 μA VOUT = 0 V to Vcc, CSB = Vcc 6
Supply Current (WRITE) ICC1 3 mA Vcc = 5.5 V, fSCK = 20 MHz, tE/W = 3.5 ms 6
Supply Current (READ) ICC2 1 mA Vcc = 1.7 V, fSCK = 5 MHz 6
Supply Current (READ) ICC3 1.5 mA Vcc = 2.5 V, fSCK = 5 MHz 6
Supply Current (READ) ICC4 3 mA Vcc = 5.5 V, fSCK = 5 MHz 6
Supply Current (READ) ICC5 2 mA Vcc = 2.5 V, fSCK = 10 MHz 6
Supply Current (READ) ICC6 4 mA Vcc = 5.5 V, fSCK = 10 MHz 6
Supply Current (READ) ICC7 8 mA Vcc = 5.5 V, fSCK = 20 MHz 6
Standby Current ISB 20 μA Vcc = 5.5 V, CSB = HOLDB = WPB = Vcc, SCK = SI = Vcc or 0 V, SO = OPEN 6
SCK Frequency fSCK 0.01 5 MHz 1.7 V ≤ Vcc < 2.5 V 7
SCK Frequency fSCK 0.01 10 MHz 2.5 V ≤ Vcc < 4.5 V 7
SCK Frequency fSCK 0.01 20 MHz 4.5 V ≤ Vcc ≤ 5.5 V 7
SCK High Time tSCKWH 80 ns 1.7 V ≤ Vcc < 2.5 V 7
SCK High Time tSCKWH 40 ns 2.5 V ≤ Vcc < 4.5 V 7
SCK High Time tSCKWH 20 ns 4.5 V ≤ Vcc ≤ 5.5 V 7
SCK Low Time tSCKWL 80 ns 1.7 V ≤ Vcc < 2.5 V 7
SCK Low Time tSCKWL 40 ns 2.5 V ≤ Vcc < 4.5 V 7
SCK Low Time tSCKWL 20 ns 4.5 V ≤ Vcc ≤ 5.5 V 7
CSB High Time tCS 85 ns 1.7 V ≤ Vcc < 2.5 V 7
CSB High Time tCS 40 ns 2.5 V ≤ Vcc < 4.5 V 7
CSB High Time tCS 20 ns 4.5 V ≤ Vcc ≤ 5.5 V 7
SI Setup Time tDIS 20 ns 1.7 V ≤ Vcc < 2.5 V 7
SI Setup Time tDIS 10 ns 2.5 V ≤ Vcc < 4.5 V 7
SI Hold Time tDIH 20 ns 1.7 V ≤ Vcc < 2.5 V 7
SI Hold Time tDIH 10 ns 2.5 V ≤ Vcc < 4.5 V 7
SI Hold Time tDIH 5 ns 4.5 V ≤ Vcc ≤ 5.5 V 7
Data Output Delay Time1 tPD1 50 ns 1.7 V ≤ Vcc < 2.5 V, CL1 = 30 pF 7
Data Output Delay Time1 tPD1 30 ns 2.5 V ≤ Vcc < 4.5 V, CL1 = 30 pF 7
Data Output Delay Time1 tPD1 20 ns 4.5 V ≤ Vcc ≤ 5.5 V, CL1 = 30 pF 7
Data Output Delay Time2 tPD2 60 ns 1.7 V ≤ Vcc < 2.5 V, CL2 = 100 pF 7
Data Output Delay Time2 tPD2 40 ns 2.5 V ≤ Vcc < 4.5 V, CL2 = 100 pF 7
Data Output Delay Time2 tPD2 25 ns 4.5 V ≤ Vcc ≤ 5.5 V, CL2 = 100 pF 7
Output Disable Time tOZ 80 ns 1.7 V ≤ Vcc < 2.5 V 7
Output Disable Time tOZ 50 ns 2.5 V ≤ Vcc < 4.5 V 7
Output Disable Time tOZ 25 ns 4.5 V ≤ Vcc ≤ 5.5 V 7
Write Time tE/W 3.5 ms 1.7 V ≤ Vcc ≤ 5.5 V 7

CAD (KiCad official)

  • Symbol: BR25H512FJ-5ACE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: br25h512fj-5ace2-etched.step / br25h512fj-5ace2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br25h512fj-5ace2.step / br25h512fj-5ace2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (42 pp, sha256 42575d08f0d3bbf4, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF