component

BR25G640FJ-3GE2

Public Made by Adom

by adom

ROHM Semicon EEPROM, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentmemorybr25g640fj-3ge2
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

BR25G640FJ-3GE2

ROHM Semicon · EEPROM · SOIC-8

BR25G640FJ-3GE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CSB input Chip select input (active LOW). Must be held HIGH during power ON/OFF to prevent erroneous writes; a pull-up to Vcc is recommended. Schmitt-trigger input.
2 SO output Serial data output. Data is shifted out MSB-first synchronous to the falling edge of SCK. High-impedance (High-Z) when CSB=HIGH or during HOLD state. VOH1 = Vcc-0.2V at IOH=-2.0mA (Vcc>=2.5V).
3 WPB input Write protect input (active LOW). When WPB=LOW and WPEN=1 in the status register, the Write Status Register (WRSR) command is prohibited. Schmitt-trigger input. Normally tied to a fixed level (Vcc or GND).
4 GND power_in Ground reference (0V) for all inputs and outputs. Connect to the system ground plane; place bypass capacitor between Vcc (pin 8) and GND close to the device.
5 SI input Serial data input. Opcode, address, and data are shifted in MSB-first on the rising edge of SCK. Schmitt-trigger input.
6 SCK input Serial clock input, up to 20MHz (Vcc>=4.5V). Supports SPI modes (CPOL,CPHA)=(0,0) and (1,1). Schmitt-trigger input with ~0.2V hysteresis; recommended rise time <=100ns.
7 HOLDB input Hold input (active LOW). When asserted LOW while SCK=LOW, suspends serial communication (SO becomes High-Z; SCK/SI become don't-care). Keep CSB=LOW during HOLD; a CSB rise while in HOLD resets the IC.
8 Vcc power_in Positive supply voltage, 1.6V to 5.5V single-supply operation. Absolute max +6.5V. Recommend a 0.1uF bypass capacitor between Vcc and GND placed close to the IC.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOIC-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • BR25G640FJ-3GE2
  • BR25G640F-3GE2
  • BR25G640FVT-3GE2
  • BR25G640FVM-3GTR
  • BR25G640NUX-3TR

CAD (KiCad official)

  • Symbol: BR25G640FJ-3GE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: br25g640fj-3ge2-etched.step / br25g640fj-3ge2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br25g640fj-3ge2.step / br25g640fj-3ge2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (None pp, sha256 d74a758a974438ab, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF