component
BR24T01FJ-WE2
Public Made by Adomby adom
ROHM Semicon EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBR24T01FJ-WE2
ROHM Semicon · EEPROM · SOIC-8
BR24T01FJ-WE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Slave address setting input that must not be left open. |
| 2 | A1 | input | Slave address setting input that must not be left open. |
| 3 | A2 | input | Slave address setting input that must not be left open. |
| 4 | GND | power_in | Reference voltage for all inputs and outputs, 0 V. |
| 5 | SDA | bidirectional | Serial data input and output for the I2C bus. |
| 6 | SCL | input | Serial clock input for the I2C bus; data is read on its rising edge. |
| 7 | WP | input | Write protect terminal. |
| 8 | VCC | power_in | Power supply connection, 1.6 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | Vcc | -0.3 | 6.5 | V | 2 | ||
| Power Dissipation (SOP-J8) | Pd | 450 | mW | Derate by 4.5mW/°C when operating above Ta=25°C | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| Operating Temperature | Topr | -40 | 85 | °C | 2 | ||
| Input Voltage / Output Voltage | VIN / VOUT | -0.3 | V | Max value (Vcc+1.0) not over 6.5V; min -0.8V when pulse width 50ns or less | 2 | ||
| Junction Temperature | Tjmax | 150 | °C | Junction temperature at the storage condition | 2 | ||
| Electrostatic Discharge Voltage (human body model) | VESD | -4000 | 4000 | V | Human body model | 2 | |
| Write Cycles | 1e+06 | Times | Ta=25ºC, Vcc=1.6V to 5.5V; not 100% tested | 2 | |||
| Data Retention | 40 | Years | Ta=25ºC, Vcc=1.6V to 5.5V; not 100% tested | 2 | |||
| Power Source Voltage | Vcc | 1.6 | 5.5 | V | 2 | ||
| Input Low Voltage1 | VIL1 | -0.3 | V | Ta=-40ºC to +85ºC, 1.7V≤Vcc≤5.5V; max is +0.3Vcc; min -0.8V at pulse width 50ns or less | 2 | ||
| Input Low Voltage2 | VIL2 | -0.3 | V | Ta=-40ºC to +85ºC, 1.6V≤Vcc<1.7V; max is +0.2Vcc; min -0.8V at pulse width 50ns or less | 2 | ||
| Output Low Voltage1 (SDA) | VOL1 | 0.4 | V | IOL=3.0mA, 2.5V≤Vcc≤5.5V | 2 | ||
| Output Low Voltage2 (SDA) | VOL2 | 0.2 | V | IOL=0.7mA, 1.6V≤Vcc<2.5V | 2 | ||
| Input Leakage Current | ILI | -1 | 1 | µA | VIN=0 to Vcc | 2 | |
| Output Leakage Current (SDA) | ILO | -1 | 1 | µA | VOUT=0 to Vcc | 2 | |
| Supply Current (Write) | ICC1 | 2 | mA | Vcc=5.5V, fSCL=400kHz, tWR=5ms, byte write, page write | 2 | ||
| Supply Current (Read) | ICC2 | 0.5 | mA | Vcc=5.5V, fSCL=400kHz, random read, current read, sequential read | 2 | ||
| Standby Current | ISB | 2 | µA | Vcc=5.5V, SDA・SCL=Vcc, A0,A1,A2=GND, WP=GND | 2 | ||
| Clock Frequency | fSCL | 400 | kHz | Ta=-40ºC to +85ºC, Vcc=1.6V to 5.5V | 3 | ||
| Data Clock High Period | tHIGH | 0.6 | µs | 3 | |||
| Data Clock Low Period | tLOW | 1.2 | µs | 3 | |||
| SDA, SCL (INPUT) Rise Time | tR | 1 | µs | Not 100% tested | 3 | ||
| SDA, SCL (INPUT) Fall Time | tF1 | 1 | µs | Not 100% tested | 3 | ||
| SDA (OUTPUT) Fall Time | tF2 | 0.3 | µs | Not 100% tested | 3 | ||
| Start Condition Hold Time | tHD:STA | 0.6 | µs | 3 | |||
| Start Condition Setup Time | tSU:STA | 0.6 | µs | 3 | |||
| Input Data Hold Time | tHD:DAT | 0 | ns | 3 | |||
| Input Data Setup Time | tSU:DAT | 100 | ns | 3 | |||
| Output Data Delay Time | tPD | 0.1 | 0.9 | µs | 3 | ||
| Output Data Hold Time | tDH | 0.1 | µs | 3 | |||
| Stop Condition Setup Time | tSU:STO | 0.6 | µs | 3 | |||
| Bus Free Time | tBUF | 1.2 | µs | 3 | |||
| Write Cycle Time | tWR | 5 | ms | 3 | |||
| Noise Spike Width (SDA and SCL) | tI | 0.1 | µs | 3 | |||
| WP Hold Time | tHD:WP | 1 | µs | 3 | |||
| WP Setup Time | tSU:WP | 0.1 | µs | 3 | |||
| WP High Period | tHIGH:WP | 1 | µs | 3 |
CAD (KiCad official)
- Symbol:
BR24T01FJ-WE2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
br24t01fj-we2-etched.step/br24t01fj-we2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);br24t01fj-we2.step/br24t01fj-we2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (36 pp, sha256
7a9d6eea98d99e36, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).