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BR24L16FVM-WTR

Public Made by Adom

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ROHM Semicon Pre-ordered Chips, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BR24L16FVM-WTR

ROHM Semicon · Pre-ordered Chips · MSOP-8

BR24L16FVM-WTR from ROHM Semicon, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 unconnected Slave address setting terminal, but for BR24L16-W it is not connected (N.C.) per the page 5 footnote.
2 A1 unconnected Slave address setting terminal, but for BR24L16-W it is not connected (N.C.) per the page 5 footnote.
3 A2 unconnected For BR24L16-W this terminal is marked Don't Use in the page 5 footnote and should not be connected.
4 GND power_in Reference voltage of all input/output, 0V.
5 SDA bidirectional Serial data input/output for slave and word address and serial data, with a noise filter built into the SCL/SDA terminal.
6 SCL input Serial clock input, read on the rising edge of SCL and with data output in sync with its falling edge.
7 WP input Write protect terminal; setting WP HIGH during the write cycle tWR cancels the write.
8 Vcc power_in Connect the power source; BR24L16-W operates from 1.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package MSOP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.3 6.5 V 2
Power Dissipation (MSOP8) Pd 310 mW When using at Ta=25℃ or higher 3.1mW to be reduced per 1℃ 2
Storage Temperature Tstg -65 125 ℃ 2
Operating Temperature Topr -40 85 ℃ 2
Terminal Voltage -0.3 V Upper limit Vcc+1.0 2
Power source voltage Vcc 1.7 5.5 V BR24L02/16/32-W: 1.7V to 5.5V 2
Input voltage VIN 0 V Upper limit Vcc 2
Number of data rewrite times 1e+06 Times Ta=25℃, Vcc=1.8V to 5.5V 2
Data hold years 40 Years Ta=25℃, Vcc=1.8V to 5.5V 2
LOW output voltage 1 (SDA) VOL1 0.4 V IOL=3.0mA, 2.5V≦Vcc≦5.5V, (SDA) 2
LOW output voltage 2 (SDA) VOL2 0.2 V IOL=0.7mA, 1.7V≦Vcc＜2.5V, (SDA) 2
Input leak current ILI -1 1 μA VIN=0V to Vcc 2
Output leak current ILO -1 1 μA VOUT=0V to Vcc, (SDA) 2
Current consumption at Byte write, Page write action ICC1 2 mA Vcc=5.5V,fSCL=400kHz, tWR=5ms, 2
Current consumption Random read, current read, sequential read ICC2 0.5 mA Vcc=5.5V,fSCL=400kHz; Random read, current read, sequential read 2
Standby current ISB 2 μA Vcc=5.5V, SDA・SCL=Vcc, A0, A1, A2=GND, WP=GND 2
SCL frequency fSCL 400 kHz FAST-MODE 2.5V≦Vcc≦5.5V 3
Data clock HIGH time tHIGH 0.6 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Data clock LOW time tLOW 1.2 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
SDA, SCL rise time tR 0.3 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
SDA, SCL fall time tF 0.3 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Start condition hold time tHD:STA 0.6 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Start condition setup time tSU:STA 0.6 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Input data hold time tHD:DAT 0 ns FAST-MODE 2.5V≦Vcc≦5.5V 3
Input data setup time tSU:DAT 100 ns FAST-MODE 2.5V≦Vcc≦5.5V 3
Output data delay time tPD 0.1 0.9 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Output data hold time tDH 0.1 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Stop condition setup time tSU:STO 0.6 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Bus release time before transfer start tBUF 1.2 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
Internal write cycle time tWR 5 ms FAST-MODE 2.5V≦Vcc≦5.5V 3
Noise removal valid period (SDA, SCL terminal) tI 0.1 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
WP hold time tHD:WP 0 ns FAST-MODE 2.5V≦Vcc≦5.5V 3
WP setup time tSU:WP 0.1 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
WP valid time tHIGH:WP 1 μs FAST-MODE 2.5V≦Vcc≦5.5V 3
SCL frequency fSCL 100 kHz STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Data clock HIGH time tHIGH 4 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Data clock LOW time tLOW 4.7 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
SDA, SCL rise time tR 1 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Start condition hold time tHD:STA 4 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Start condition setup time tSU:STA 4.7 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Input data setup time tSU:DAT 250 ns STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Output data delay time tPD 0.2 3.5 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Output data hold time tDH 0.2 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Stop condition setup time tSU:STO 4.7 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3
Bus release time before transfer start tBUF 4.7 μs STANDARD-MODE 1.8V≦Vcc≦5.5V 3

CAD (KiCad official)

  • Symbol: BR24L16FVM-WTR
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: br24l16fvm-wtr-etched.step / br24l16fvm-wtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br24l16fvm-wtr.step / br24l16fvm-wtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (39 pp, sha256 1b11a87f7a3b4e76, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF