component

BR24L02FVM-WTR

Public Made by Adom

by adom

ROHM Semicon Pre-ordered Chips, MSOP-8-2.8mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsbr24l02fvm-wtrfactory-2.0.0extractor-text

Verified BR24L02FVM-WTR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: BR24L02FVM-WTR · MSOP-8-2.8mm · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 39-page datasheet
  • ✓distributor: lcsc C2061698, digikey BR24L02FVM-WTR-ND, mouser 755-BR24L02FVM-WTR
  • ✓family: MSOP-8_3x3mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ftnugofz/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ br24l02fvm-wtr.kicad_sym✓ br24l02fvm-wtr.kicad_mod✓ br24l02fvm-wtr.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers br24l02fvm-wtr: viewers · Ray 4d ago
br24l02fvm-wtr-etched.glb Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr-etched.step br24l02fvm-wtr: factory component page (tier=mfr) · Ray 4d ago
br24l02fvm-wtr-hero.glb br24l02fvm-wtr: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
br24l02fvm-wtr-hero.overlay.json Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr.glb Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr.kicad_mod Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr.kicad_sym Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr.lbr Publish 0.1.0 · Ray 4d ago
br24l02fvm-wtr.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 4d ago

BR24L02FVM-WTR

ROHM Semicon · Pre-ordered Chips · MSOP-8-2.8mm

BR24L02FVM-WTR from ROHM Semicon, in a MSOP-8-2.8mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Slave address setting input; for the BR24L02-W the datasheet pin table lists A0 as Not connected, so it need not be driven.
2 A1 input Slave address setting input; for the BR24L02-W the datasheet pin table lists A1 as Not connected, so it need not be driven.
3 A2 input Slave address setting input; for the BR24L02-W the datasheet pin table lists A2 as Not used.
4 GND power_in Reference voltage for all input and output signals, 0V.
5 SDA bidirectional Serial data input/output for slave and word addresses and data; the SCL/SDA terminals have a built-in noise filter.
6 SCL input Serial clock input; data is latched on the rising edge of SCL and output in sync with its falling edge.
7 WP input Write protect terminal; it must be LOW from the rising edge of the first data bit's clock until tWR to execute a write, and setting it HIGH cancels the write.
8 Vcc power_in Power supply input; the BR24L02-W operates from 1.7V to 5.5V.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package MSOP-8-2.8mm
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.3 6.5 V 2
Terminal voltage -0.3 V 2
Power dissipation (MSOP8) Pd 310 mW MSOP8; when using at Ta=25℃ or higher, 3.1mW to be reduced per 1℃ 2
Storage temperature Tstg -65 125 ℃ 2
Operating temperature Topr -40 85 ℃ 2
Power source voltage Vcc 1.7 5.5 V BR24L02-W per footnote *1: 1.7V to 5.5V 2
Input voltage VIN 0 V 2
Number of data rewrite times 1e+06 Times Ta=25℃, Vcc=1.8V to 5.5V (BR24L02: 1.7V to 5.5V); not 100% tested 2
Data hold years 40 Years Ta=25℃, Vcc=1.8V to 5.5V (BR24L02: 1.7V to 5.5V); not 100% tested 2
LOW output voltage 1 (SDA) VOL1 0.4 V IOL=3.0mA, 2.5V≦Vcc≦5.5V, (SDA) 2
LOW output voltage 2 (SDA) VOL2 0.2 V IOL=0.7mA, 1.7V≦Vcc＜2.5V, (SDA) 2
Input leak current ILI -1 1 μA VIN=0V to Vcc 2
Output leak current (SDA) ILO -1 1 μA VOUT=0V to Vcc, (SDA) 2
Current consumption, random/current/sequential read ICC2 0.5 mA Vcc=5.5V, fSCL=400kHz 2
Standby current ISB 2 μA Vcc=5.5V, SDA・SCL=Vcc, A0, A1, A2=GND, WP=GND 2
SCL frequency fSCL 400 kHz FAST-MODE, 2.5V≦Vcc≦5.5V 3
SCL frequency fSCL 100 kHz STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Data clock HIGH time tHIGH 0.6 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Data clock HIGH time tHIGH 4 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Data clock LOW time tLOW 1.2 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Data clock LOW time tLOW 4.7 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
SDA, SCL rise time tR 0.3 μs FAST-MODE, 2.5V≦Vcc≦5.5V; not 100% tested 3
SDA, SCL rise time tR 1 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V; not 100% tested 3
SDA, SCL fall time tF 0.3 μs FAST-MODE, 2.5V≦Vcc≦5.5V; not 100% tested 3
Start condition hold time tHD:STA 0.6 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Start condition hold time tHD:STA 4 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Start condition setup time tSU:STA 0.6 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Start condition setup time tSU:STA 4.7 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Input data hold time tHD:DAT 0 ns FAST-MODE, 2.5V≦Vcc≦5.5V 3
Input data setup time tSU:DAT 100 ns FAST-MODE, 2.5V≦Vcc≦5.5V 3
Input data setup time tSU:DAT 250 ns STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Output data delay time tPD 0.1 0.9 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Output data delay time tPD 0.2 3.5 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Output data hold time tDH 0.1 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Output data hold time tDH 0.2 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Stop condition setup time tSU:STO 0.6 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Stop condition setup time tSU:STO 4.7 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Bus release time before transfer start tBUF 1.2 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
Bus release time before transfer start tBUF 4.7 μs STANDARD-MODE, 1.8V≦Vcc≦5.5V 3
Internal write cycle time tWR 5 ms FAST-MODE, 2.5V≦Vcc≦5.5V 3
Noise removal valid period (SDA, SCL) tI 0.1 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
WP hold time tHD:WP 0 ns FAST-MODE, 2.5V≦Vcc≦5.5V 3
WP setup time tSU:WP 0.1 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3
WP valid time tHIGH:WP 1 μs FAST-MODE, 2.5V≦Vcc≦5.5V 3

CAD (KiCad official)

  • Symbol: BR24L02FVM-WTR
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8-2.8mm (KiCad packages3D, STEP)
  • 3D model files: br24l02fvm-wtr-etched.step / br24l02fvm-wtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br24l02fvm-wtr.step / br24l02fvm-wtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (39 pp, sha256 1ad50b79517ccca6, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF