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BR24G04NUX-3TTR
Public Made by Adomby adom
ROHM Semicon Pre-ordered Chips, VSON-8-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BR24G04NUX-3TTR
ROHM Semicon · Pre-ordered Chips · VSON-8-EP(2x3)
BR24G04NUX-3TTR from ROHM Semicon, in a VSON-8-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | passive | Not used as a device address pin ("Don't use"); it may be set to any of H, L or Hi-Z. |
| 2 | A1 | input | Slave address setting input; must not be left open. |
| 3 | A2 | input | Slave address setting input; must not be left open. |
| 4 | GND | power_in | Reference voltage of all inputs and outputs, 0V. |
| 5 | SDA | bidirectional | Serial data input and serial data output. |
| 6 | SCL | input | Serial clock input. |
| 7 | WP | input | Write protect terminal. |
| 8 | VCC | power_in | Power source connection, 1.6V to 5.5V single supply operation. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | VSON-8-EP(2x3) |
| Category | Interface ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input High Voltage1 | VIH1 | 0.7 | V | 1.7V≤Vcc≤5.5V; min 0.7Vcc, max Vcc+1.0 | 2 | ||
| Input Low Voltage1 | VIL1 | -0.3 | V | 1.7V≤Vcc≤5.5V; max +0.3Vcc | 2 | ||
| Input High Voltage2 | VIH2 | 0.8 | V | 1.6V≤Vcc<1.7V; min 0.8Vcc, max Vcc+1.0 | 2 | ||
| Input Low Voltage2 | VIL2 | -0.3 | V | 1.6V≤Vcc<1.7V; max +0.2Vcc | 2 | ||
| Output Low Voltage1 | VOL1 | 0.4 | V | IOL=3.0mA, 2.5V≤VCC≤5.5V (SDA) | 2 | ||
| Output Low Voltage2 | VOL2 | 0.2 | V | IOL=0.7mA, 1.6V≤VCC<2.5V (SDA) | 2 | ||
| Input Leakage Current | ILI | -1 | 1 | µA | VIN=0 to Vcc | 2 | |
| Output Leakage Current | ILO | -1 | 1 | µA | VOUT=0 to Vcc (SDA) | 2 | |
| Supply Current (Write) | ICC1 | 2 | mA | Vcc=5.5V, fSCL=400kHz, tWR=5ms, Byte write, Page write | 2 | ||
| Supply Current (Read) | ICC2 | 0.5 | mA | Vcc=5.5V, fSCL=400kHz, Random read, current read, sequential read | 2 | ||
| Standby Current | ISB | 2 | µA | Vcc=5.5V, SDA, SCL=Vcc, A0,A1,A2=GND, WP=GND | 2 | ||
| Clock Frequency | fSCL | 400 | kHz | 3 | |||
| Data Clock High Period | tHIGH | 0.6 | µs | 3 | |||
| Data Clock Low Period | tLOW | 1.2 | µs | 3 | |||
| SDA, SCL (INPUT) Rise Time | tR | 1 | µs | Not 100% tested | 3 | ||
| SDA, SCL (INPUT) Fall Time | tF1 | 1 | µs | Not 100% tested | 3 | ||
| SDA (OUTPUT) Fall Time | tF2 | 0.3 | µs | Not 100% tested | 3 | ||
| Start Condition Hold Time | tHD:STA | 0.6 | µs | 3 | |||
| Start Condition Setup Time | tSU:STA | 0.6 | µs | 3 | |||
| Input Data Hold Time | tHD:DAT | 0 | ns | 3 | |||
| Input Data Setup Time | tSU:DAT | 100 | ns | 3 | |||
| Output Data Delay Time | tPD | 0.1 | 0.9 | µs | 3 | ||
| Output Data Hold Time | tDH | 0.1 | µs | 3 | |||
| Stop Condition Setup Time | tSU:STO | 0.6 | µs | 3 | |||
| Bus Free Time | tBUF | 1.2 | µs | 3 | |||
| Write Cycle Time | tWR | 5 | ms | 3 | |||
| Noise Spike Width (SDA and SCL) | tI | 0.1 | µs | 3 | |||
| WP Hold Time | tHD:WP | 1 | µs | 3 | |||
| WP Setup Time | tSU:WP | 0.1 | µs | 3 | |||
| WP High Period | tHIGH:WP | 1 | µs | 3 | |||
| Write Cycles | 1e+06 | Times | Ta=25°C, VCC=1.6V to 5.5V; Not 100% tested | 2 | |||
| Data Retention | 40 | Years | Ta=25°C, VCC=1.6V to 5.5V; Not 100% tested | 2 | |||
| Power Source Voltage | VCC | 1.6 | 5.5 | V | 2 | ||
| Input Voltage | VIN | 0 | V | 0 to Vcc | 2 | ||
| Operating Temperature | Topr | -40 | 85 | °C | 2 | ||
| Supply Voltage | VCC | -0.3 | 6.5 | V | Ta=25°C | 2 | |
| Power Dissipation | Pd | 300 | mW | VSON008X2030; derate by 3.0mW/°C above Ta=25°C | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| Operating Temperature | Topr | -40 | 85 | °C | 2 | ||
| Input Voltage / Output Voltage | -0.3 | V | max Vcc+1.0, not over 6.5V; min -0.8V for pulse width 50ns or less | 2 | |||
| Junction Temperature | Tjmax | 150 | °C | Junction temperature at the storage condition | 2 | ||
| Electrostatic discharge voltage (human body model) | VESD | -4000 | 4000 | V | 2 | ||
| LVCC voltage (write inhibit) | LVCC | 1.2 | V | At LVCC voltage or below, data rewrite is prevented | 21 |
CAD (KiCad official)
- Symbol:
BR24G04NUX-3TTR - Footprint:
Package_SON:SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm - 3D model: VSON-8-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
br24g04nux-3ttr-etched.step/br24g04nux-3ttr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);br24g04nux-3ttr.step/br24g04nux-3ttr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (36 pp, sha256
39b574eee8865142, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BR24G04NUX-3TTR
**ROHM Semicon** · Pre-ordered Chips · VSON-8-EP(2x3)
BR24G04NUX-3TTR from ROHM Semicon, in a VSON-8-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | passive | Not used as a device address pin ("Don't use"); it may be set to any of H, L or Hi-Z. |
| 2 | A1 | input | Slave address setting input; must not be left open. |
| 3 | A2 | input | Slave address setting input; must not be left open. |
| 4 | GND | power_in | Reference voltage of all inputs and outputs, 0V. |
| 5 | SDA | bidirectional | Serial data input and serial data output. |
| 6 | SCL | input | Serial clock input. |
| 7 | WP | input | Write protect terminal. |
| 8 | VCC | power_in | Power source connection, 1.6V to 5.5V single supply operation. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | VSON-8-EP(2x3) |
| Category | Interface ICs |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input High Voltage1 | VIH1 | 0.7 | | | V | 1.7V≤Vcc≤5.5V; min 0.7Vcc, max Vcc+1.0 | 2 |
| Input Low Voltage1 | VIL1 | -0.3 | | | V | 1.7V≤Vcc≤5.5V; max +0.3Vcc | 2 |
| Input High Voltage2 | VIH2 | 0.8 | | | V | 1.6V≤Vcc<1.7V; min 0.8Vcc, max Vcc+1.0 | 2 |
| Input Low Voltage2 | VIL2 | -0.3 | | | V | 1.6V≤Vcc<1.7V; max +0.2Vcc | 2 |
| Output Low Voltage1 | VOL1 | | | 0.4 | V | IOL=3.0mA, 2.5V≤VCC≤5.5V (SDA) | 2 |
| Output Low Voltage2 | VOL2 | | | 0.2 | V | IOL=0.7mA, 1.6V≤VCC<2.5V (SDA) | 2 |
| Input Leakage Current | ILI | -1 | | 1 | µA | VIN=0 to Vcc | 2 |
| Output Leakage Current | ILO | -1 | | 1 | µA | VOUT=0 to Vcc (SDA) | 2 |
| Supply Current (Write) | ICC1 | | | 2 | mA | Vcc=5.5V, fSCL=400kHz, tWR=5ms, Byte write, Page write | 2 |
| Supply Current (Read) | ICC2 | | | 0.5 | mA | Vcc=5.5V, fSCL=400kHz, Random read, current read, sequential read | 2 |
| Standby Current | ISB | | | 2 | µA | Vcc=5.5V, SDA, SCL=Vcc, A0,A1,A2=GND, WP=GND | 2 |
| Clock Frequency | fSCL | | | 400 | kHz | | 3 |
| Data Clock High Period | tHIGH | 0.6 | | | µs | | 3 |
| Data Clock Low Period | tLOW | 1.2 | | | µs | | 3 |
| SDA, SCL (INPUT) Rise Time | tR | | | 1 | µs | Not 100% tested | 3 |
| SDA, SCL (INPUT) Fall Time | tF1 | | | 1 | µs | Not 100% tested | 3 |
| SDA (OUTPUT) Fall Time | tF2 | | | 0.3 | µs | Not 100% tested | 3 |
| Start Condition Hold Time | tHD:STA | 0.6 | | | µs | | 3 |
| Start Condition Setup Time | tSU:STA | 0.6 | | | µs | | 3 |
| Input Data Hold Time | tHD:DAT | 0 | | | ns | | 3 |
| Input Data Setup Time | tSU:DAT | 100 | | | ns | | 3 |
| Output Data Delay Time | tPD | 0.1 | | 0.9 | µs | | 3 |
| Output Data Hold Time | tDH | 0.1 | | | µs | | 3 |
| Stop Condition Setup Time | tSU:STO | 0.6 | | | µs | | 3 |
| Bus Free Time | tBUF | 1.2 | | | µs | | 3 |
| Write Cycle Time | tWR | | | 5 | ms | | 3 |
| Noise Spike Width (SDA and SCL) | tI | | | 0.1 | µs | | 3 |
| WP Hold Time | tHD:WP | 1 | | | µs | | 3 |
| WP Setup Time | tSU:WP | 0.1 | | | µs | | 3 |
| WP High Period | tHIGH:WP | 1 | | | µs | | 3 |
| Write Cycles | | 1e+06 | | | Times | Ta=25°C, VCC=1.6V to 5.5V; Not 100% tested | 2 |
| Data Retention | | 40 | | | Years | Ta=25°C, VCC=1.6V to 5.5V; Not 100% tested | 2 |
| Power Source Voltage | VCC | 1.6 | | 5.5 | V | | 2 |
| Input Voltage | VIN | 0 | | | V | 0 to Vcc | 2 |
| Operating Temperature | Topr | -40 | | 85 | °C | | 2 |
| Supply Voltage | VCC | -0.3 | | 6.5 | V | Ta=25°C | 2 |
| Power Dissipation | Pd | | | 300 | mW | VSON008X2030; derate by 3.0mW/°C above Ta=25°C | 2 |
| Storage Temperature | Tstg | -65 | | 150 | °C | | 2 |
| Operating Temperature | Topr | -40 | | 85 | °C | | 2 |
| Input Voltage / Output Voltage | | -0.3 | | | V | max Vcc+1.0, not over 6.5V; min -0.8V for pulse width 50ns or less | 2 |
| Junction Temperature | Tjmax | | | 150 | °C | Junction temperature at the storage condition | 2 |
| Electrostatic discharge voltage (human body model) | VESD | -4000 | | 4000 | V | | 2 |
| LVCC voltage (write inhibit) | LVCC | | 1.2 | | V | At LVCC voltage or below, data rewrite is prevented | 21 |
## CAD (KiCad official)
- Symbol: `BR24G04NUX-3TTR`
- Footprint: `Package_SON:SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm`
- 3D model: VSON-8-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `br24g04nux-3ttr-etched.step` / `br24g04nux-3ttr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `br24g04nux-3ttr.step` / `br24g04nux-3ttr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ROHM Semicon datasheet](docs/br24g04nux-3ttr-datasheet.pdf) (36 pp, sha256 `39b574eee8865142`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/br24g04nux-3ttr-datasheet.pdf)