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Initial commit: component/br24g02fj-3agte2

Ray ·a392b0473d ·2mo ago
2 files changed +88
README.mdadded+54
@@ -0,0 +1,54 @@+# BR24G02FJ-3AGTE2++**ROHM Semicon** · EEPROM · SOIC-8++BR24G02FJ-3AGTE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | Slave address input bit A0. Combined with A1/A2, selects one of up to 8 devices sharing the I2C bus (device code fixed '1010'). Do not leave open; tie to Vcc or GND. |+| 2 | A1 | input | Slave address input bit A1. Combined with A0/A2 to set device address on shared I2C bus. Must be tied to Vcc or GND - not allowed to float. |+| 3 | A2 | input | Slave address input bit A2. Combined with A0/A1 to set device address on shared I2C bus. Must be tied to Vcc or GND - not allowed to float. |+| 4 | GND | power_in | Ground reference (0 V) for all inputs and outputs. Must be the lowest potential under all operating conditions. |+| 5 | SDA | bidirectional | I2C serial data input/output. NMOS open-drain - requires external pull-up resistor (typ. a few kΩ to tens of kΩ). Input high >= 0.7 Vcc; output low <= 0.4 V at IOL=3 mA (Vcc >= 2.5 V). Built-in noise filter. |+| 6 | SCL | input | I2C serial clock input. Supports up to 400 kHz at Vcc 1.6-1.7 V and up to 1 MHz at Vcc 1.7-5.5 V. Data latched on rising edge; output changes on falling edge. Built-in noise filter. |+| 7 | WP | input | Write-protect input. WP = Vcc (H) inhibits data rewrite of all addresses; WP = GND (L) enables writes. Must not be left open. Pull to Vcc when used as ROM to prevent accidental writes at low supply voltages. |+| 8 | VCC | power_in | Positive supply input. Operating range 1.6 V to 5.5 V (1 MHz operation requires >= 1.7 V). Absolute max 6.5 V. A 0.1 µF bypass capacitor between VCC and GND is recommended, placed as close to the IC as possible. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | ROHM Semicon |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `BR24G02FJ-3AGTE2`+- `BR24G02FJ-3AGTE2F-3AGTE2`+- `BR24G02FJ-3AGTE2FVT-3AGE2`+- `BR24G02FJ-3AGTE2FVJ-3AGTE2`+- `BR24G02FJ-3AGTE2FVM-3AGTTR`+- `BR24G02FJ-3AGTE2NUX-3ATTR`++## CAD (KiCad official)++- Symbol: `BR24G02FJ-3AGTE2`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [ROHM Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588952295719505920) (None pp, sha256 `ad6a23289c33c85d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/br24g02fj-3agte2-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "br24g02fj-3agte2",+  "version": "0.1.0",+  "type": "component",+  "description": "ROHM Semicon EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "br24g02fj-3agte2"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "br24g02fj-3agte2.kicad_sym",+    "br24g02fj-3agte2.kicad_mod",+    "br24g02fj-3agte2.glb",+    "br24g02fj-3agte2.step",+    "br24g02fj-3agte2.lbr",+    "docs/hero.png",+    "docs/br24g02fj-3agte2-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file