component

BQ7791504PWR

Public Made by Adom

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Texas Instruments Battery Management, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)bq7791504pwrfactory-2.0.0extractor-text

Verified BQ7791504PWR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 24 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: BQ7791504PWR · TSSOP-24 · 24 pins
  • ✓copper: 24 copper pads, none touching another net
  • ✓datasheet: all 24 pin names found in the 56-page datasheet
  • ✓distributor: lcsc C2873309, digikey 296-BQ7791504PWRTR-ND, mouser 595-BQ7791504PWR
  • ✓family: TSSOP-24_4.4x7.8mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-_1bulu56/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 24 pins = 24 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 24 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ bq7791504pwr.kicad_sym✓ bq7791504pwr.kicad_mod✓ bq7791504pwr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers bq7791504pwr: viewers · Ray 1d ago
bq7791504pwr-etched.glb Publish 0.1.0 · Ray 1d ago
bq7791504pwr-etched.step bq7791504pwr: factory component page (tier=mfr) · Ray 1d ago
bq7791504pwr-hero.glb bq7791504pwr: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
bq7791504pwr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
bq7791504pwr.glb Publish 0.1.0 · Ray 1d ago
bq7791504pwr.kicad_mod Publish 0.1.0 · Ray 1d ago
bq7791504pwr.kicad_sym Publish 0.1.0 · Ray 1d ago
bq7791504pwr.lbr Publish 0.1.0 · Ray 1d ago
bq7791504pwr.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 24 pins · Ray 1d ago

BQ7791504PWR

Texas Instruments · Battery Management · TSSOP-24

BQ7791504PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Device supply voltage input; recommended supply range is 3 V to 25 V and the absolute maximum input rating is 36 V.
2 AVDD power_out Analog supply output that should only be connected to a capacitor; recommended range is 0 V to 3 V.
3 VC5 input Cell voltage sense input for the top cell; VC5-VC4 input range is 0 V to 5 V.
4 VC4 input Cell voltage sense input; VC4-VC3 input range is 0 V to 5 V and cell balancing current is up to 50 mA.
5 VC3 input Cell voltage sense input; VC3-VC2 input range is 0 V to 5 V and cell balancing current is up to 50 mA.
6 VC2 input Cell voltage sense input; VC2-VC1 input range is 0 V to 5 V and cell balancing current is up to 50 mA.
7 VC1 input Cell voltage sense input; VC1-VC0 input range is 0 V to 5 V and cell balancing current is up to 50 mA.
8 VC0 input Cell voltage sense input for the bottom cell; absolute maximum range is -0.3 V to 3.6 V.
9 VSS power_in Analog ground; all voltages are referenced to this pin.
10 SRP input Current sense input connected to the battery side of the sense resistor; recommended range is -0.2 V to 0.8 V.
11 SRN input Current sense input connected to the pack side of the sense resistor; recommended range is -0.2 V to 0.8 V.
12 DSG output DSG FET driver output; absolute maximum output voltage range is -0.3 V to 20 V and output current is 1 mA.
13 CHG output CHG FET driver output; absolute maximum output voltage range is -30 V to 20 V and output current is 1 mA.
14 LD input PACK- load removal detection input; absolute maximum range is -30 V to 20 V and recommended range is 0 V to 16 V.
15 LPWR output HIBERNATE mode communication pin; connect to the PRES pin of the lower device in a stack, and leave floating for a single device.
16 CBI input Cell balancing input; leave floating to disable cell balancing, do not drive with an external supply, and drive low to enable cell balancing.
17 OCDP input Connect a resistor from this pin to VSS to program the OCD1/2 fault detection delay; use a 10-MΩ resistor to VSS for upper devices in a stack.
18 TS input Thermistor measurement input; connect a 10-kΩ resistor to VSS if the function is not used.
19 VTB output Thermistor bias output; recommended range is 0 V to 3 V.
20 CCFG input Cell in-series configuration input; recommended range is 0 V to AVDD.
21 CBO output Cell balancing output; connect through a 10-kΩ resistor to the CBI pin of the upper device in a stack, and leave floating for a single device.
22 PRES input HIBERNATE mode input; drive high for NORMAL mode and leave floating for HIBERNATE mode; recommended range is 0 V to 16 V.
23 CTRC input CHG and DSG override input; recommended range is 0 V to (VDD + 5) V.
24 CTRD input CHG and DSG override input; recommended range is 0 V to (VDD + 5) V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Power Management (PMIC)
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VBAT 3 25 V VDD 5
Operating free-air temperature range TOPR -40 85 °C 6
Input voltage range cell-to-cell VI 0 5 V VC5-VC4, VC4-VC3, VC3-VC2, VC2-VC1, VC1-VC0 6
Input voltage range PRES VI 0 16 V PRES 6
Input voltage range LD VI 0 16 V LD 6
Output voltage range CHG, DSG VO 0 16 V CHG, DSG 6
Output voltage range VTB, AVDD, LPWR VO 0 3 V VTB, AVDD, LPWR 6
Input voltage range SRN, SRP VI -0.2 0.8 V SRN, SRP 6
Input voltage absolute maximum VDD, VC5-VC4, CTRD, CTRC VI -0.3 36 V VDD, VC5, VC4, VC3, VC2, VC1, CTRD, CTRC 5
Input voltage absolute maximum LD VI -30 20 V LD 5
Input voltage absolute maximum PRES VI -0.3 36 V PRES 5
Input voltage absolute maximum VC0, SRN, SRP, TS, AVDD, CCFG, CBI VI -0.3 3.6 V VC0, SRN, SRP, TS, AVDD, CCFG, CBI 5
Output voltage absolute maximum DSG VO -0.3 20 V DSG 5
Output voltage absolute maximum CHG VO -30 20 V CHG 5
Output voltage absolute maximum CBO VO -0.3 36 V CBO 5
Output voltage absolute maximum LPWR VO -30 3.6 V LPWR 5
Output voltage absolute maximum VTB, OCDP VO -0.3 3.6 V VTB, OCDP 5
Input current absolute maximum LD, CHG II 500 µA LD, CHG 5
Input current absolute maximum DSG II 1 mA DSG 5
Output current absolute maximum CHG, DSG IO 1 mA CHG, DSG 5
Cell balancing output current absolute maximum IO 50 mA Cell balancing current (VC5, VC4, VC3, VC2, VC1, VC0) 5
Storage temperature Tstg -65 150 °C 5
Lead temperature soldering 10 s TSOLDER 300 °C 10 s 5
ESD human-body model V(ESD) -1000 1000 V HBM, per ANSI/ESDA/JEDEC JS-001 5
ESD charged-device model V(ESD) -250 250 V CDM, per JEDEC JESD22-C101 5
NORMAL mode current ICC 8 15 µA Cell1 through Cell5 = 4 V, VDD = 20 V, No cell balancing 7
HIBERNATE mode current IHIB 2 3 µA Cell1 through Cell5 = 4 V, VDD = 20 V, HIBERNATE mode 7
SHUTDOWN mode current IOFF 0.5 µA VDD < VSHUT, CTRC/CTRD floating 7
Overvoltage programmable threshold range VOV 3000 4575 mV 7
Undervoltage programmable threshold range VUV 1200 3000 mV 7
OV detection accuracy VVA -10 10 mV TA = 25°C, OV detection accuracy 7
UV detection accuracy VVA -18 18 mV TA = 25°C, UV detection accuracy 7
OV UV detection accuracy over 0 to 60 °C VVA -28 26 mV TA = 0 to 60°C 7
OV UV detection accuracy over -40 to +85 °C VVA -40 40 mV TA = -40 to +85°C 7
Overcurrent charge programmable threshold range VOCC 5 80 mV (VSRP-VSRN) 8
Overcurrent discharge 1 programmable threshold range VOCD1 -85 -10 mV 8
Overcurrent discharge 2 programmable threshold range VOCD2 -170 -20 mV 8
Short circuit discharge programmable threshold range VSCD -340 -40 mV 8
OCD1 detection accuracy at lower thresholds VCCAL -30 30 % VOCD1 ≤ 20 mV 8
OCC, OCD1, OCD2, SCD detection accuracy VCCAH -20 20 % VOCD1 > 20 mV; all OCC, OCD2 and SCD threshold ranges 8
Open-wire fault voltage threshold VOW 450 500 550 mV Voltage falling on VCx, 3.6 V to 0 V 9
CHG/DSG on gate drive voltage VFETON 11 12 14 V VDD ≥ 12 V, CL = 10 nF 10
Cell balancing internal FET resistance RBAL 8 12 20 Ω Cell1 through Cell5 = 4 V, VDD = 20 V 10
PRES High Threshold VPRESH 1.25 1.5 1.75 V 10
LD threshold VLDT 1.25 1.3 1.35 V OPEN pack terminals 11
LD clamp voltage VLDCLAMP 16 19 20 V ILDCLAMP = 300 µA 11
Open-wire sink current 100-nA configuration ILKG_100nA 30 110 175 nA All cell voltages = 4 V, 100-nA configuration 7
Thermal resistance junction-to-ambient PW 24-pin RΘJA 88.9 °C/W 7
Thermal resistance junction-to-case top PW 24-pin RΘJC(top) 26.5 °C/W 7
Thermal resistance junction-to-board PW 24-pin RΘJB 43.5 °C/W 7
Junction-to-top characterization parameter PW 24-pin ψJT 1.1 °C/W 7
Junction-to-board characterization parameter PW 24-pin ψJB 43 °C/W 7

CAD (KiCad official)

  • Symbol: BQ7791504PWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: bq7791504pwr-etched.step / bq7791504pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq7791504pwr.step / bq7791504pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (56 pp, sha256 b4c3be4ca64c0bd0, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF