component
BQ7791501PWR
Public Made by Adomby adom
Texas Instruments Battery Management, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
bq7791501pwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+90−10
package.json+48−8@@ -59,7 +59,7 @@ "number": "2", "name": "AVDD", "type": "power_out",- "description": "Analog supply voltage output with 1 \u00b5F capacitor connection and output voltage 2.1 V to 3.6 V."+ "description": "Analog supply voltage output with 1 µF capacitor connection and output voltage 2.1 V to 3.6 V." }, { "number": "3",@@ -149,13 +149,13 @@ "number": "17", "name": "OCDP", "type": "input",- "description": "OCD1/2 fault detection delay programming input; connect resistor to VSS to program overcurrent detection delay; 10 M\u03a9 resistor for upper devices in stack."+ "description": "OCD1/2 fault detection delay programming input; connect resistor to VSS to program overcurrent detection delay; 10 MΩ resistor for upper devices in stack." }, { "number": "18", "name": "TS", "type": "input",- "description": "Thermistor measurement input with voltage 0 to VTB for temperature-based protection; connect 10 k\u03a9 resistor to VSS if not used."+ "description": "Thermistor measurement input with voltage 0 to VTB for temperature-based protection; connect 10 kΩ resistor to VSS if not used." }, { "number": "19",@@ -173,7 +173,7 @@ "number": "21", "name": "CBO", "type": "output",- "description": "Cell balancing output with voltage 0 to VDD; connect through 10 k\u03a9 resistor to CBI of upper device in stacked configuration."+ "description": "Cell balancing output with voltage 0 to VDD; connect through 10 kΩ resistor to CBI of upper device in stacked configuration." }, { "number": "22",@@ -185,13 +185,13 @@ "number": "23", "name": "CTRC", "type": "input",- "description": "CHG FET control override input with voltage 0 to (VDD + 5) V; enable/disable CHG driver; use 10 M\u03a9 current limit resistor."+ "description": "CHG FET control override input with voltage 0 to (VDD + 5) V; enable/disable CHG driver; use 10 MΩ current limit resistor." }, { "number": "24", "name": "CTRD", "type": "input",- "description": "DSG FET control override input with voltage 0 to (VDD + 5) V; enable/disable DSG driver; use 10 M\u03a9 current limit resistor."+ "description": "DSG FET control override input with voltage 0 to (VDD + 5) V; enable/disable DSG driver; use 10 MΩ current limit resistor." } ], "provenance": {@@ -226,6 +226,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "bq7791501pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "bq7791501pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "7f1ca48d3af27f20d21201a4878c2a14435b68480c321111ce3d9ea711a9f25d",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -211,7 +211,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "bq7791501pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "bq7791501pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "7f1ca48d3af27f20d21201a4878c2a14435b68480c321111ce3d9ea711a9f25d",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -258,4 +298,4 @@ "visibility": { "public": true }-}+}