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BQ7721603PWR

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Texas Instruments Battery Management ICs, TSSOP-24(4.4x7.8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BQ7721603PWR

Texas Instruments · Battery Management ICs · TSSOP-24(4.4x7.8)

BQ7721603PWR from Texas Instruments, in a TSSOP-24(4.4x7.8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Not electrically connected and can be left floating.
2 VDD power_in Power supply; VDD equals the top-of-stack voltage, with a recommended supply range of 5 V to 75 V.
3 V16 input Sense input for the positive voltage of the sixteenth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
4 V15 input Sense input for the positive voltage of the fifteenth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
5 V14 input Sense input for the positive voltage of the fourteenth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
6 V13 input Sense input for the positive voltage of the thirteenth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
7 V12 input Sense input for the positive voltage of the twelfth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
8 V11 input Sense input for the positive voltage of the eleventh cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
9 V10 input Sense input for the positive voltage of the tenth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
10 V9 input Sense input for the positive voltage of the ninth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
11 V8 input Sense input for the positive voltage of the eighth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
12 V7 input Sense input for the positive voltage of the seventh cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
13 V6 input Sense input for the positive voltage of the sixth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
14 V5 input Sense input for the positive voltage of the fifth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
15 NC unconnected Not electrically connected and can be left floating.
16 NC unconnected Not electrically connected and can be left floating.
17 V4 input Sense input for the positive voltage of the fourth cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
18 V3 input Sense input for the positive voltage of the third cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
19 V2 input Sense input for the positive voltage of the second cell from the bottom of the stack; the Vn - Vn-1 input voltage range is 0 V to 5 V.
20 V1 input Sense input for the positive voltage of the lowest cell in the stack; the V1 - VSS input voltage range is 0 V to 5 V.
21 VSS power_in Electrically connected to IC ground and to the negative terminal of the lowest cell in the stack.
22 COUT output Output drive for overvoltage, open wire, and overtemperature; it can be left floating if not used.
23 DOUT output Output drive for undervoltage, open wire, and overtemperature; it can be left floating if not used.
24 TS input Temperature sensor input with a 0 V to 1.5 V input voltage range; leave it NC if not used.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24(4.4x7.8)
Category Power Supply Chip
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range (VDD - VSS) VDD - VSS -0.3 85 V 5
Input voltage range (Vn - VSS) Vn - VSS -0.3 85 V where n = 1 to 16 5
Input voltage range (TS) TS -0.3 1.5 V 5
Output voltage range (COUT - VSS, DOUT - VSS) COUT - VSS, DOUT - VSS -0.3 85 V 5
Functional temperature TFUNC -40 110 °C 5
Storage temperature TSTG -65 150 °C 5
ESD human body model (HBM) V(ESD) -2000 2000 V Human body model, per ANSI/ESDA/JEDEC JS-001, all pins 5
ESD charged device model (CDM) V(ESD) -500 500 V Charged device model, per ANSI/ESDA/JEDEC JS-002, all pins 5
Supply voltage (VDD) VDD 5 75 V 5
Input voltage range of Vn - Vn-1 VIN 0 5 V where n = 2 to 16 and V1 - VSS 5
Input voltage range (TS) TS 0 1.5 V 5
Customer Test Mode entry voltage VCTM 12 13 V VDD > V16 + VCTM 5
Total capacitance on the TS pin CTS 200 pF 5
Ambient temperature TA -40 85 °C 5
Junction temperature TJ -65 150 °C 5
OV detection range VOV 3.55 5.1 V 6
OV detection accuracy VOV_ACC -10 10 mV TA = 25℃ 6
OV detection accuracy VOV_ACC -20 20 mV 0℃ ≤ TA ≤ 60℃ 6
OV detection accuracy VOV_ACC -50 50 mV -40℃ ≤ TA ≤ 110℃ 6
UV detection range VUV 1 3.5 V 6
UV detection accuracy VUV_ACC -30 30 mV TA = 25℃ 6
UV detection accuracy VUV_ACC -50 50 mV -40 ≤ TA ≤ 110℃ 6
UV detection disabled threshold VUV_MIN 450 500 550 mV Vn - Vn-1 where n = 2 to 16 and V1 - VSS 6
OT detection range TOT 62 83 °C Available options: 62°C, 65°C, 70°C, 75°C, 80°C, 83°C 6
OT detection accuracy TOT_ACC -5 5 °C Assured by design; assumes external resistance within ±2% of ROT_EXT 6
Internal pull-up resistor (RNTC) RNTC 19.5 20 20.6 kΩ After TI factory trim 7
OW detection threshold (Vn < Vn-1) VOW -200 mV Vn < Vn-1 where n = 2 to 16 7
OW detection threshold (V1 - VSS) VOW 500 mV V1 - VSS 7
OW detection accuracy VOW_ACC -25 25 mV -40 ℃ ≤ TA ≤ 110℃ 7
Supply current ICC 2 3.5 µA No fault detected 7
Input current at Vx pins (open wire enabled) IIN -0.3 0.3 µA Vn - Vn-1 and V1 - VSS = 4V, where n = 2 to 16, Open Wire Enabled 7
Output drive voltage, active high 6V VOUT_AH 6 V Vn - Vn-1 or V1 - VSS > VOV, where n = 2 to 16, VDD = 58 V, IOH = 100 µA measured out of COUT, DOUT pin 7
Output drive voltage, active high (VDD) VDD - VCOUT, VDD - VDOUT 0 1 1.5 V Vn - Vn-1 or V1 - VSS > VOV, where n = 2 to 16, IOH = 10 µA measured out of COUT, DOUT pin 7
Output drive voltage, active high 6V (15 of 16 cells shorted) VDD - VCOUT, VDD - VDOUT 0 1 1.5 V If 15 of 16 cells are short circuited and only one cell remains powered and > VOV, VDD = Vx, IOH = 100 µA 7
Output drive voltage, active high 6V and VDD (below VOV) VOUT_AH 250 400 mV Vn - Vn-1 and V1 - VSS < VOV, where n = 2 to 16, VDD = 58 V, IOH = 100 µA measured into pin 7
Internal pull-up resistor (active high) ROUT_AH 80 100 120 kΩ 7
OUT source current (during OV) IOUT_AH_H 4.5 mA Vn - Vn-1 or V1 - VSS > VOV, where n = 2 to 16, VDD = 58 V, OUT = 0V, measured out of COUT, DOUT pin 7
OUT sink current (no OV) IOUT_AH_L 0.3 3 mA Vn - Vn-1 and V1 - VSS < VOV, where n = 2 to 16, VDD = 58 V, OUT = VDD, measured into COUT, DOUT pin 7
OV delay time (BQ7721603) tOV_DELAY 2 s Device Comparison Table: OVP DELAY 2 s 8
UV delay time (BQ7721603) tUV_DELAY 2 s Device Comparison Table: UVP DELAY 2 s 8
OT delay time tOT_DELAY 4 s 8
OW delay time tOW_DELAY 4 s 8
Delay time drift across operating temperature tDELAY_DR -10 10 % For all delays other than 0.25 s, 0.5 s, 1 s 8
Fault detection delay time during Customer Test Mode tCTM_DELAY 50 ms See Customer Test Mode 8
OV detection threshold (BQ7721603) VOV 4.3 V Device Comparison Table: BQ7721603 OVP (V) 3
UV detection threshold (BQ7721603) VUV 2 V Device Comparison Table: BQ7721603 UVP (V) 3
OT detection threshold (BQ7721603) TOT 75 °C Device Comparison Table: BQ7721603 OTC (°C) 3
OT detection external resistance at 75°C ROT_EXT 1915 Ω OT threshold 75°C 6
Junction-to-ambient thermal resistance RθJA 97.8 °C/W PW (TSSOP) 24-pin 5
Junction-to-case (top) thermal resistance RθJC(top) 40.5 °C/W PW (TSSOP) 24-pin 5
Junction-to-board thermal resistance RθJB 53.1 °C/W PW (TSSOP) 24-pin 5
Junction-to-top characterization parameter ΨJT 4.3 °C/W PW (TSSOP) 24-pin 5
Junction-to-board characterization parameter ΨJB 52.7 °C/W PW (TSSOP) 24-pin 5

CAD (KiCad official)

  • Symbol: BQ7721603PWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24(4.4x7.8) (KiCad packages3D, STEP)
  • 3D model files: bq7721603pwr-etched.step / bq7721603pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq7721603pwr.step / bq7721603pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 00317454776b7c6a, retrieved 2026-10-29, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF