component
BQ7694204PFBR
Public Made by Adomby adom
Texas Instruments Battery Management, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 1d ago |
| viewers | 1d ago |
| bq7694204pfbr-etched.glb | 1d ago |
| bq7694204pfbr-etched.step | 1d ago |
| bq7694204pfbr-hero.glb | 1d ago |
| bq7694204pfbr-hero.overlay.json | 1d ago |
| bq7694204pfbr.glb | 1d ago |
| bq7694204pfbr.kicad_mod | 1d ago |
| bq7694204pfbr.kicad_sym | 1d ago |
| bq7694204pfbr.lbr | 1d ago |
| bq7694204pfbr.step | 1d ago |
| package.json | 1d ago |
| page.json | 1d ago |
| README.md | 1d ago |
BQ7694204PFBR
Texas Instruments · Battery Management · TQFP-48(7x7)
BQ7694204PFBR from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | This pin is not connected to silicon. |
| 2 | VC9 | input | Sense voltage input for the ninth cell from the bottom of the stack, balance current input for cell 9, and return balance current for cell 10. |
| 3 | NC | unconnected | This pin is not connected to silicon. |
| 4 | VC8 | input | Sense voltage input for the eighth cell from the bottom of the stack, balance current input for cell 8, and return balance current for cell 9. |
| 5 | NC | unconnected | This pin is not connected to silicon. |
| 6 | VC7 | input | Sense voltage input for the seventh cell from the bottom of the stack, balance current input for cell 7, and return balance current for cell 8. |
| 7 | NC | unconnected | This pin is not connected to silicon. |
| 8 | VC6 | input | Sense voltage input for the sixth cell from the bottom of the stack, balance current input for cell 6, and return balance current for cell 7. |
| 9 | NC | unconnected | This pin is not connected to silicon. |
| 10 | VC5 | input | Sense voltage input for the fifth cell from the bottom of the stack, balance current input for cell 5, and return balance current for cell 6. |
| 11 | NC | unconnected | This pin is not connected to silicon. |
| 12 | VC4 | input | Sense voltage input for the fourth cell from the bottom of the stack, balance current input for cell 4, and return balance current for cell 5. |
| 13 | VC3 | input | Sense voltage input for the third cell from the bottom of the stack, balance current input for cell 3, and return balance current for cell 4. |
| 14 | VC2 | input | Sense voltage input for the second cell from the bottom of the stack, balance current input for cell 2, and return balance current for cell 3. |
| 15 | VC1 | input | Sense voltage input for the first cell from the bottom of the stack, balance current input for cell 1, and return balance current for cell 2. |
| 16 | VC0 | input | Sense voltage input for the negative terminal of the first cell from the bottom of the stack, and return balance current for cell 1. |
| 17 | VSS | power_in | Device ground. |
| 18 | SRP | input | Analog input to the internal coulomb counter, connected to the top of the sense resistor, where a charging current produces a positive voltage at SRP relative to SRN and the differential voltage must stay within the ±200 mV range for current measurement. |
| 19 | NC | unconnected | This pin is not connected to silicon. |
| 20 | SRN | input | Analog input to the internal coulomb counter, connected to the bottom of the sense resistor, forming the differential pair with SRP. |
| 21 | TS1 | bidirectional | Thermistor input or general purpose ADC input (open-drain / analog I/O). |
| 22 | TS2 | bidirectional | Thermistor input that also functions as wakeup from SHUTDOWN, or general purpose ADC input; should be left floating if the device is to enter SHUTDOWN mode. |
| 23 | TS3 | bidirectional | Thermistor input or general purpose ADC input (open-drain / analog I/O). |
| 24 | REG18 | power_out | Internal 1.8 V LDO output, for internal use only. |
| 25 | ALERT | bidirectional | Multifunction pin that can be the ALERT output, HDQ I/O, thermistor input, general purpose ADC input, or general purpose digital output. |
| 26 | SCL | bidirectional | Multifunction pin that can be SCL or SPI_SCLK (open-drain I/O). |
| 27 | SDA | bidirectional | Multifunction pin that can be SDA or SPI_MISO (open-drain I/O). |
| 28 | HDQ | bidirectional | Multifunction pin that can be HDQ I/O, SPI_MOSI, thermistor input, general purpose ADC input, or general purpose digital output. |
| 29 | CFETOFF | bidirectional | Multifunction pin that can be CFETOFF, SPI_CS, thermistor input, general purpose ADC input, or general purpose digital output. |
| 30 | DFETOFF | bidirectional | Multifunction pin that can be DFETOFF or BOTHOFF, thermistor input, general purpose ADC input, or general purpose digital output. |
| 31 | DCHG | bidirectional | Multifunction pin that can be DCHG, thermistor input, general purpose ADC input, or general purpose digital output. |
| 32 | DDSG | bidirectional | Multifunction pin that can be DDSG, thermistor input, general purpose ADC input, or general purpose digital output. |
| 33 | RST_SHUT | input | Digital input for reset or shutdown; it should be driven low during normal operation, and if held high for 1 second the device enters SHUTDOWN mode. |
| 34 | REG2 | power_out | Second LDO (REG2) output, programmable to 1.8 V, 2.5 V, 3.0 V, 3.3 V, or 5.0 V. |
| 35 | REG1 | power_out | First LDO (REG1) output, programmable to 1.8 V, 2.5 V, 3.0 V, 3.3 V, or 5.0 V. |
| 36 | REGIN | input | Input pin for the REG1 and REG2 LDOs. |
| 37 | BREG | output | Base control signal for an external preregulator transistor. |
| 38 | FUSE | bidirectional | Fuse sense and drive pin, intended to drive the gate of an NFET used to blow a chemical fuse. |
| 39 | PDSG | output | Predischarge PFET control output. |
| 40 | PCHG | output | Precharge PFET control output. |
| 41 | LD | bidirectional | Load detect pin. |
| 42 | PACK | input | Pack sense input pin. |
| 43 | DSG | output | NMOS discharge FET drive output pin. |
| 44 | NC | unconnected | This pin is not connected to silicon. |
| 45 | CHG | output | NMOS charge FET drive output pin. |
| 46 | CP1 | bidirectional | Charge pump capacitor pin. |
| 47 | BAT | power_in | Primary power supply input pin. |
| 48 | VC10 | input | Sense voltage input for the tenth cell from the bottom of the stack, balance current input for cell 10, and top-of-stack measurement point. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFP-48(7x7) |
| Category | Power Management (PMIC) |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
BQ7694204PFBR - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
bq7694204pfbr-etched.step/bq7694204pfbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq7694204pfbr.step/bq7694204pfbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (85 pp, sha256
a976a88e92abb957, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).