BQ76925PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCTL	output	3.3-V regulator control voltage; it adjusts automatically to keep V3P3 at 3.3 V when a bypass FET is used, and VCTL is recommended between 0.8 V and 26.4 V.
2	BAT	power_in	Supply voltage tied to the most positive cell, with a recommended range of 4.2 V to 26.4 V.
3	VC6	input	Sense voltage input for the most positive cell.
4	VC5	input	Sense voltage input for the second most positive cell.
5	VC4	input	Sense voltage input for the third most positive cell.
6	VC3	input	Sense voltage input for the fourth most positive cell.
7	VC2	input	Sense voltage input for the fifth most positive cell.
8	VC1	input	Sense voltage input for the least positive cell.
9	VC0	input	Sense voltage input for the negative end of the cell stack, rated -3 V to 3 V absolute maximum, and negative swings should be avoided.
10	VSS	power_in	Ground reference for the device.
11	SENSEN	input	Negative current sense input, rated -3 V to 3 V absolute maximum.
12	SENSEP	input	Positive current sense input, with a recommended range of -125 mV to 375 mV.
13	ALERT	output	Overcurrent alert open-drain output, with a recommended alert function range of 0 V to 5.5 V.
14	VIOUT	output	Current measurement voltage output, rated -0.3 V to 3.6 V absolute maximum.
15	VCOUT	output	Cell measurement voltage output, rated -0.3 V to 3.6 V absolute maximum.
16	VTB	output	Bias voltage output for the thermistor network, recommended up to 5.5 V.
17	VREF	power_in	Reference voltage output for the host ADC, set to 1.5 V or 3 V by REFSEL.
18	SDA	bidirectional	I2C data line (open drain), recommended range 0 V to 5.5 V.
19	SCL	input	I2C clock line (open drain), recommended range 0 V to 5.5 V.
20	V3P3	power_out	Integrated 3.3-V regulator output for powering the microcontroller or LEDs.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-20
Category	Power Management (PMIC)
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage BAT	VBAT	-0.3		36	V		4
Cell input differential VCn to VCn+1	VI	-0.3		9	V	n = 0 to 5	4
BAT to VC6 differential	VI	-10		10	V		4
VC0 input voltage	VI	-3		3	V	VC0	4
SENSEP, SENSEN input voltage	VI	-3		3	V		4
SCL, SDA input voltage	VI	-0.3		6	V		4
VCOUT, VIOUT, VREF output voltage	VO	-0.3		3.6	V		4
VTB, V3P3 output voltage	VO	-0.3		7	V		4
ALERT output voltage	VO	-0.3		30	V		4
VCTL output voltage	VO	-0.3		36	V		4
Cell balancing current	ICB			70	mA		4
Cell input current	IIN	-25		70	mA	Cell input	4
Storage temperature	Tstg	-65		150	°C		4
ESD HBM	V(ESD)	-2000		2000	V	Human-body model per ANSI/ESDA/JEDEC JS-001	4
ESD CDM	V(ESD)	-500		500	V	Charged-device model per JEDEC JESD22-C101	4
Supply voltage BAT		4.2		26.4	V		5
Cell input differential VCn to VCn+1	VI	1.4		4.4	V	n = 0 to 5	5
BAT to VC6 differential	VI	-8		8	V		5
SCL, SDA input voltage	VI	0		5.5	V		5
V3P3 backfeeding	V3P3			5.5	V	Backfeeding	5
ALERT wakeup function voltage	VI	0		26.4	V	Wakeup function	5
VCOUT, VIOUT output voltage	VO	0			V	Max is V3P3 + 0.2 V	5
VTB voltage	VTB			5.5	V		5
VCTL voltage	VCTL	0.8		26.4	V		5
ALERT voltage alert function	VO	0		5.5	V	Alert function	5
Cell balancing current	ICB	0		50	mA		5
Operating free-air temperature	TA	-25		85	°C		5
Functional free-air temperature	TFUNC	-40		100	°C		5
Junction-to-ambient thermal resistance	RθJA		97.5		°C/W	PW (TSSOP) 20 pins	5
Junction-to-case (top) thermal resistance	RθJC (top)		31.7		°C/W	PW (TSSOP) 20 pins	5
Junction-to-board thermal resistance	RθJB		48.4		°C/W	PW (TSSOP) 20 pins	5
Junction-to-top characterization parameter	ψJT		1.5		°C/W	PW (TSSOP) 20 pins	5
Junction-to-board characterization parameter	ψJB		47.9		°C/W	PW (TSSOP) 20 pins	5
Normal mode supply current	IDD1		40	48	µA	All device functions enabled; all pins unloaded; SDA and SCL high	6
Standby mode 1 supply current	IDD2		14	17	µA	V3P3 and overcurrent monitor enabled; all pins unloaded; SDA and SCL high	6
Standby mode 2 supply current	IDD3		12	14	V	V3P3 enabled; all pins unloaded; SDA and SCL high	6
Sleep mode supply current	IDD4		1	1.5	µA	V3P3 disabled; all pins unloaded; SDA and SCL low	6
Input current for selected cell n=6	IVCn		2.4	2.7		All cell voltages equal; cell balancing disabled; open cell detection disabled; n = 6	6
Input current for selected cell n=1-5	IVCn			0.5	µA	All cell voltages equal; cell balancing disabled; open cell detection disabled; n = 1, 5	6
Input current for selected cell n=1-5 at 25°C	IVCn			0.3		n = 1, 5 at 25°C	6
Cell to cell input current difference	∆IVCn			0.2	µA	All cell voltages equal; cell balancing disabled; open cell detection disabled	6
Power on reset voltage, initial BAT < 1.4 V	VPOR	4.3	4.5	4.7	V	Measured at BAT pin; initial BAT < 1.4 V; BAT rising	6
Power on reset voltage, initial BAT > 1.4 V	VPOR	6.5	7	7.5	V	Measured at BAT pin; initial BAT > 1.4 V; BAT rising	6
Wakeup voltage	VWAKE	0.8		2	V	Measured at ALERT pin	6
Regulator control voltage	VCTL	3.3		26.4	V	Measured at VCTL, V3P3 regulating	6
Regulator output	VV3P3	3.2	3.3	3.4	V	Measured at V3P3, IREG = 0 to 4 mA, BAT = 4.2 to 26.4 V	6
V3P3 short circuit current limit	ISC	10		17	mA	V3P3 = 0.0 V	6
Thermistor bias internal resistance	RTB	90		130	Ω	RDS(ON) for internal FET switch, ITB = 1 mA	6
Voltage reference output before gain correction REF_SEL=0	VREF	1.44		1.56	V	Before gain correction, TA = 25°C, REF_SEL = 0	7
Voltage reference output before gain correction REF_SEL=1	VREF	2.88		3.12	V	Before gain correction, TA = 25°C, REF_SEL = 1	7
Voltage reference tolerance after gain correction REF_SEL=0	VREF	-0.1	1.5	0.1	%	After gain correction, TA = 25°C, REF_SEL = 0	7
Voltage reference tolerance after gain correction REF_SEL=1	VREF	-0.1	3	0.1	%	After gain correction, TA = 25°C, REF_SEL = 1	7
Reference calibration voltage VCOUT_SEL=2	VREF_CAL	-0.9		0.9	%	Measured at VCOUT, VCOUT_SEL = 2; nominal 0.5 × VREF	7
Reference calibration voltage VCOUT_SEL=3	VREF_CAL	-0.5		0.5	%	Measured at VCOUT, VCOUT_SEL = 3; nominal 0.85 × VREF	7
Reference calibration voltage difference	VREF_CAL	-0.3		0.3	%	(0.85 × VREF), (0.5 × VREF); nominal 0.35 × VREF	7
Voltage reference tolerance over temperature	∆VREF	-40		40	ppm/°C	TA = 0, 50°C	7
Cell voltage amplifier gain REF_SEL=0	GVCOUT	-1.6	0.3	1.5	%	Measured from VCn to VCOUT, REF_SEL = 0	7
Cell voltage amplifier gain REF_SEL=1	GVCOUT	-1.6	0.6	1.5	%	Measured from VCn to VCOUT, REF_SEL = 1	7
Cell voltage amplifier offset	OVCOUT	-16		15	mV	Measured from VCn to VCOUT	7
Cell voltage amp output range REF_SEL=0	VCOUT	1.47	1.5	1.53	V	Measured at VCOUT, VCn = 5 V, REF_SEL = 0	7
Cell voltage amp output range REF_SEL=1	VCOUT	2.94	3	3.06	V	Measured at VCOUT, VCn = 5 V, REF_SEL = 1	7
Cell voltage amplifier accuracy at TA = 25°C	∆VCOUT	-3		3	mV	VCn = 1.4 V to 4.4 V, after correction, REF_SEL = 1, TA = 25°C	7
Cell voltage amplifier accuracy at TA = 0°C to 50°C	∆VCOUT	-5		5	mV	VCn = 1.4 V to 4.4 V, after correction, REF_SEL = 1, TA = 0°C to 50°C	7
Cell voltage amplifier accuracy at TA = -25°C to +85°C	∆VCOUT	-8		8	mV	VCn = 1.4 V to 4.4 V, after correction, REF_SEL = 1, TA = -25°C to +85°C	7
Current sense amp input range	VIIN	-125		375	mV	Measured from SENSEN, SENSEP to VSS	7
Current sense amp output range REF_SEL=0	VIOUT	0.25		1.25	V	Measured at VIOUT, REF_SEL = 0	7
Current sense amp output range REF_SEL=1	VIOUT	0.5		2.5	V	Measured at VIOUT, REF_SEL = 1	7
Zero current output REF_SEL=0	VIOUT		1		V	Measured at VIOUT, SENSEP = SENSEN, REF_SEL = 0	7
Zero current output REF_SEL=1	VIOUT		2		V	Measured at VIOUT, SENSEP = SENSEN, REF_SEL = 1	7
Current amplifier accuracy	∆VIOUT	-1		1	%		7
Current comparator trip threshold	VITRIP	25		400	mV	Trip threshold selectable from 25 to 400 mV	8
Current comparator accuracy at VITRIP = 25 mV	∆VITRIP	-6		6	mV	VITRIP = 25 mV	8
Current comparator accuracy at VITRIP > 25 mV	∆VITRIP	-10		10	%	VITRIP > 25 mV	8
ALERT output low logic voltage	VOL_ALERT			0.4	V	IALERT = 1 mA	8
ALERT leakage current	IALERT_LKG			1	µA	ALERT = 5 V, output Hi-Z	8
Internal temperature voltage	VTEMP_INT	1.15	1.2	1.25	V	Measured at VCOUT, TINT = 25°C	8
Internal temperature voltage sensitivity	∆VTEMP_INT		-4.4		mV/°C		8
Cell balancing internal resistance VC1	RBAL	1	3	5	Ω	RDS(ON) for VC1 internal FET switch, VCn = 3.6 V	8
Cell balancing internal resistance VC2 to VC6	RBAL	3	5.5	8	Ω	RDS(ON) for internal VC2 to VC6 FET switch, VCn = 3.6 V	8
Input low logic threshold	VIL			0.6	V	I2C compatible interface	9
Input high logic threshold	VIH	2.8			V	I2C compatible interface	9
Output low logic drive IOL=1 mA	VOL			0.2	V	IOL = 1 mA	9
Output low logic drive IOL=2.5 mA	VOL			0.4	V	IOL = 2.5 mA	9
SCL, SDA rise time	tr			1000	ns		9
SCL, SDA fall time	tf			300	ns		9
SCL pulse width high	tw(H)	4			µs		9
SCL pulse width low	tw(L)	4.7			µs		9
Setup time for START condition	tsu(STA)	4.7			µs		9
START condition hold time	th(STA)	4			µs	START condition hold time after which first clock pulse is generated	9
Data setup time	tsu(DAT)	250			ns		9
Setup time for STOP condition	tsu(STOP)	4			µs		9
Time the bus must be free before new transmission	tsu(BUF)	4.7			µs		9
Clock low to data out valid				900	ns		9
SCL clock frequency	fSCL	0		100	kHz		9

CAD (KiCad official)

Symbol: BQ76925PWR
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model files: bq76925pwr-etched.step / bq76925pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq76925pwr.step / bq76925pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (47 pp, sha256 32a71f49b482d2c8, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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BQ76925PWR

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