component
BQ7692000PWR
Public Made by Adomby adom
Texas Instruments Battery Management, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ7692000PWR
Texas Instruments · Battery Management · TSSOP-20
BQ7692000PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DSG | output | Discharge FET low-side driver with 12 V pull-up and VSS pull-down |
| 2 | CHG | output | Charge FET low-side driver with 12 V pull-up and high-impedance pull-down |
| 3 | VSS | power_in | Chip ground reference |
| 4 | SDA | bidirectional | I2C serial data line with open-drain output (0-3.6 V logic levels) |
| 5 | SCL | input | I2C serial clock line input (0-3.6 V logic levels) |
| 6 | TS1 | input | Thermistor #1 positive terminal with internal 10 kΩ pull-up to 3.3 V reference |
| 7 | CAP1 | output | External bypass capacitor connection point to VSS (recommended 1 µF) |
| 8 | REGOUT | power_out | Regulated output voltage from internal LDO (2.5 V option for this variant, max 10 mA load) |
| 9 | REGSRC | power_in | Input source for internal LDO regulator (6-25 V operating range) |
| 10 | BAT | power_in | Battery positive (top-most) terminal and primary supply voltage (6-25 V for BQ76920) |
| 11 | NC | unconnected | No internal connection |
| 12 | VC5 | input | 5th cell positive terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 13 | VC4 | input | 4th cell positive terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 14 | VC3 | input | 3rd cell positive terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 15 | VC2 | input | 2nd cell positive terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 16 | VC1 | input | 1st cell positive terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 17 | VC0 | input | 1st cell negative terminal voltage sense input (14-bit ADC, 382 µV/LSB, 0-5 V range) |
| 18 | SRP | input | Negative current sense input (nearest VSS), operating range -10 to +10 mV |
| 19 | SRN | input | Positive current sense input across sense resistor, operating range -200 to +200 mV |
| 20 | ALERT | bidirectional | Alert interrupt output (open-drain) and external override input to host microcontroller |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
BQ7692000PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
bq7692000pwr-etched.step/bq7692000pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq7692000pwr.step/bq7692000pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (70 pp, sha256
9ddaaac2ca3b2ca1, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).