component
BQ50002ARHBR
Public Made by Adomby adom
Texas Instruments Wireless Charge-Discharge ICs, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BQ50002ARHBR
Texas Instruments · Wireless Charge-Discharge ICs · VQFN-32(5x5)
BQ50002ARHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWM1/CLK_IN | input | Input with a weak internal pull-down, controlled by bq500511A for system power delivery; acts as CLK_IN, where each rising edge steps the switching frequency (or duty factor) up or down. |
| 2 | PWM_CTRL | input | Input with a weak internal pull-down, controlled by bq500511A; with EN high, a HIGH level selects direct PWM control and a LOW level selects self-switching. |
| 3 | EN | input | Enable input with a weak internal pull-down; floating or pulling below 1.5 V disables the gate driver, demodulation and current sense, and pulling above 2.2 V enables the gate driver. |
| 4 | BP3 | output | LDO output regulating a 3-V supply; tie with a 2.2-µF capacitor to GND; for use by bq500511A only. |
| 5 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 6 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 7 | DMOUT2 | output | Demodulated 2-kHz signal output from CHAN2; for use by bq500511A only. |
| 8 | DMOUT1 | output | Demodulated 2-kHz signal output from CHAN1; for use by bq500511A only. |
| 9 | CLK_OUT | output | Internal oscillator clock output at 3.3-V logic level, with frequency equal to the current switching frequency and 50% duty factor. |
| 10 | MODE | input | Input with a weak internal pull-down; floating or pulling below 1.5 V selects frequency control, and pulling above 2.2 V selects pulse-width control of the internal PWM signal. |
| 11 | DMIN1 | input | Modulated signal input from the coil for demodulation channel 1; recommended range is -0.3 V to 5 V and absolute maximum range is -5 V to 7 V. |
| 12 | DMIN2 | input | Modulated signal input from the coil for demodulation channel 2; recommended range is -0.3 V to 5 V and absolute maximum is 7 V. |
| 13 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 14 | PVIN2 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 15 | PVIN2 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 16 | BOOT2 | bidirectional | Positive supply rail for the high-side gate driver; connect a 0.1-µF ceramic capacitor between BOOT2 and SW2; absolute maximum is 14 V relative to GND. |
| 17 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 18 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 19 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 20 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 21 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 22 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 23 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 24 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 25 | BOOT1 | bidirectional | Positive supply rail for the high-side gate driver; connect a 0.1-µF ceramic capacitor between BOOT1 and SW1; absolute maximum is 14 V relative to GND. |
| 26 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 27 | PVIN1 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 28 | PVIN1 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 29 | CSN | input | Current sense amplifier negative input; CSN to CSP differential is limited to -0.5 V to 0.5 V. |
| 30 | CSP | input | Current sense amplifier positive input; connect the current sense resistor as close as possible to this pin, which also serves as the quiet node for the power supply input. |
| 31 | CSO | output | Current sense amplifier output with voltage gain of 50; for use by bq500511A only. |
| 32 | PWM2/UP_DN | input | Input with a weak internal pull-down, controlled by bq500511A; sets the direction of self-switching frequency steps (LOW increases frequency, HIGH decreases it when PWM_CTRL is LOW and MODE is LOW). |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(5x5) |
| Category | Power Management (PMIC) |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
BQ50002ARHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
bq50002arhbr-etched.step/bq50002arhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq50002arhbr.step/bq50002arhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
34f0b6f2e6824e49, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BQ50002ARHBR
**Texas Instruments** · Wireless Charge-Discharge ICs · VQFN-32(5x5)
BQ50002ARHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWM1/CLK_IN | input | Input with a weak internal pull-down, controlled by bq500511A for system power delivery; acts as CLK_IN, where each rising edge steps the switching frequency (or duty factor) up or down. |
| 2 | PWM_CTRL | input | Input with a weak internal pull-down, controlled by bq500511A; with EN high, a HIGH level selects direct PWM control and a LOW level selects self-switching. |
| 3 | EN | input | Enable input with a weak internal pull-down; floating or pulling below 1.5 V disables the gate driver, demodulation and current sense, and pulling above 2.2 V enables the gate driver. |
| 4 | BP3 | output | LDO output regulating a 3-V supply; tie with a 2.2-µF capacitor to GND; for use by bq500511A only. |
| 5 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 6 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 7 | DMOUT2 | output | Demodulated 2-kHz signal output from CHAN2; for use by bq500511A only. |
| 8 | DMOUT1 | output | Demodulated 2-kHz signal output from CHAN1; for use by bq500511A only. |
| 9 | CLK_OUT | output | Internal oscillator clock output at 3.3-V logic level, with frequency equal to the current switching frequency and 50% duty factor. |
| 10 | MODE | input | Input with a weak internal pull-down; floating or pulling below 1.5 V selects frequency control, and pulling above 2.2 V selects pulse-width control of the internal PWM signal. |
| 11 | DMIN1 | input | Modulated signal input from the coil for demodulation channel 1; recommended range is -0.3 V to 5 V and absolute maximum range is -5 V to 7 V. |
| 12 | DMIN2 | input | Modulated signal input from the coil for demodulation channel 2; recommended range is -0.3 V to 5 V and absolute maximum is 7 V. |
| 13 | GND | power_in | Signal ground for the ground-referenced logic; all signal-level circuits should be referenced to this pin unless otherwise noted. |
| 14 | PVIN2 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 15 | PVIN2 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 16 | BOOT2 | bidirectional | Positive supply rail for the high-side gate driver; connect a 0.1-µF ceramic capacitor between BOOT2 and SW2; absolute maximum is 14 V relative to GND. |
| 17 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 18 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 19 | SW2 | output | Switch node of the half-bridge MOSFETs; connect to the resonant capacitor. |
| 20 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 21 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 22 | PGND | power_in | Power ground for the ground-referenced power stage; connect to GND. |
| 23 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 24 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 25 | BOOT1 | bidirectional | Positive supply rail for the high-side gate driver; connect a 0.1-µF ceramic capacitor between BOOT1 and SW1; absolute maximum is 14 V relative to GND. |
| 26 | SW1 | output | Switch node of the half-bridge MOSFETs; connect to the TX coil. |
| 27 | PVIN1 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 28 | PVIN1 | power_in | DC input voltage for the half-bridge MOSFET, recommended 4.5 V to 5.5 V with absolute maximum of 7 V; bypass to GND as specified in the datasheet. |
| 29 | CSN | input | Current sense amplifier negative input; CSN to CSP differential is limited to -0.5 V to 0.5 V. |
| 30 | CSP | input | Current sense amplifier positive input; connect the current sense resistor as close as possible to this pin, which also serves as the quiet node for the power supply input. |
| 31 | CSO | output | Current sense amplifier output with voltage gain of 50; for use by bq500511A only. |
| 32 | PWM2/UP_DN | input | Input with a weak internal pull-down, controlled by bq500511A; sets the direction of self-switching frequency steps (LOW increases frequency, HIGH decreases it when PWM_CTRL is LOW and MODE is LOW). |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(5x5) |
| Category | Power Management (PMIC) |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `BQ50002ARHBR`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files: `bq50002arhbr-etched.step` / `bq50002arhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq50002arhbr.step` / `bq50002arhbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq50002a) (31 pp, sha256 `34f0b6f2e6824e49`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bq50002arhbr-datasheet.pdf)