component
BQ4802LYDW
Public Made by Adomby adom
Texas Instruments Real Time Clocks, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 21h ago |
| viewers | 21h ago |
| bq4802lydw-etched.glb | 21h ago |
| bq4802lydw-etched.step | 21h ago |
| bq4802lydw-hero.glb | 21h ago |
| bq4802lydw-hero.overlay.json | 21h ago |
| bq4802lydw.glb | 21h ago |
| bq4802lydw.kicad_mod | 21h ago |
| bq4802lydw.kicad_sym | 21h ago |
| bq4802lydw.lbr | 21h ago |
| bq4802lydw.step | 21h ago |
| package.json | 21h ago |
| page.json | 21h ago |
| README.md | 21h ago |
BQ4802LYDW
Texas Instruments · Real Time Clocks · SOIC-28-300mil
BQ4802LYDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Provides the higher of VCC or VBC, switched internally, to supply external RAM. |
| 2 | X1 | passive | Crystal connection for the 32.768-kHz quartz crystal. |
| 3 | X2 | passive | Crystal connection for the 32.768-kHz quartz crystal. |
| 4 | WDO | output | Goes low if WDI remains high or low longer than the watchdog time-out period, returns high on the next WDI transition, and remains high if WDI is unconnected. |
| 5 | INT | output | Goes low when a power-fail, periodic, or alarm condition occurs; INT is an open-drain output. |
| 6 | RST | bidirectional | Goes low when VCC falls below the power-fail threshold and stays low for 200 ms (typical) after VCC crosses the threshold on power-up; also accepts a push-button override and re-enters the reset cycle when released from being pulled low for more than 1 µs. |
| 7 | A3 | input | Address input that, together with A0-A2, allows access to the 16 bytes of real-time clock and control registers. |
| 8 | A2 | input | Address input that, together with A0, A1 and A3, allows access to the 16 bytes of real-time clock and control registers. |
| 9 | A1 | input | Address input that, together with A0, A2 and A3, allows access to the 16 bytes of real-time clock and control registers. |
| 10 | A0 | input | Address input that, together with A1-A3, allows access to the 16 bytes of real-time clock and control registers. |
| 11 | DQ0 | bidirectional | x8 data bus bit 0 for real-time clock information, connected to the memory data bus. |
| 12 | DQ1 | bidirectional | x8 data bus bit 1 for real-time clock information, connected to the memory data bus. |
| 13 | DQ2 | bidirectional | x8 data bus bit 2 for real-time clock information, connected to the memory data bus. |
| 14 | VSS | power_in | Ground reference for the device. |
| 15 | DQ3 | bidirectional | x8 data bus bit 3 for real-time clock information, connected to the memory data bus. |
| 16 | DQ4 | bidirectional | x8 data bus bit 4 for real-time clock information, connected to the memory data bus. |
| 17 | DQ5 | bidirectional | x8 data bus bit 5 for real-time clock information, connected to the memory data bus. |
| 18 | DQ6 | bidirectional | x8 data bus bit 6 for real-time clock information, connected to the memory data bus. |
| 19 | DQ7 | bidirectional | x8 data bus bit 7 for real-time clock information, connected to the memory data bus. |
| 20 | VSS | power_in | Ground reference for the device (second VSS pin; leave unconnected only in the SNAPHAT DSH package). |
| 21 | CS | input | Chip-select input for the device. |
| 22 | OE | input | Provides the read control for the real-time clock memory locations. |
| 23 | WDI | input | Three-level watchdog input; if held high or low longer than the 1.5-s default time-out, WDO goes low, and leaving it unconnected disables the watchdog (sets mid-supply internally). |
| 24 | BC | power_in | Connect to a 3-V backup cell; a voltage within the VBC range must be present at power-up for proper oscillator start-up. |
| 25 | CEOUT | output | Goes low only when CEIN is low and VCC is above the power-fail threshold; if power fails while CEIN is low, it stays low for 100 µs or until CEIN goes high, whichever occurs first. |
| 26 | CEIN | input | Input to the chip-enable gating circuit that controls CEOUT. |
| 27 | WE | input | Provides the write control for the real-time clock memory locations. |
| 28 | VCC | power_in | 5-V or 3.3-V supply input; the bq4802LY is specified for 2.7 V to 3.6 V in recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-28-300mil |
| Category | Clock/Timing |
| Pins | 28 |
CAD (KiCad official)
- Symbol:
BQ4802LYDW - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
bq4802lydw-etched.step/bq4802lydw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq4802lydw.step/bq4802lydw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
56b33867dd7e9d2c, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).