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Initial commit: component/bq4802lydw

Ray ·6a49c03278 ·23h ago
2 files changed +385
README.mdadded+64
@@ -0,0 +1,64 @@+# BQ4802LYDW++**Texas Instruments** · Real Time Clocks · SOIC-28-300mil++BQ4802LYDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT | power_out | Provides the higher of VCC or VBC, switched internally, to supply external RAM. |+| 2 | X1 | passive | Crystal connection for the 32.768-kHz quartz crystal. |+| 3 | X2 | passive | Crystal connection for the 32.768-kHz quartz crystal. |+| 4 | WDO | output | Goes low if WDI remains high or low longer than the watchdog time-out period, returns high on the next WDI transition, and remains high if WDI is unconnected. |+| 5 | INT | output | Goes low when a power-fail, periodic, or alarm condition occurs; INT is an open-drain output. |+| 6 | RST | bidirectional | Goes low when VCC falls below the power-fail threshold and stays low for 200 ms (typical) after VCC crosses the threshold on power-up; also accepts a push-button override and re-enters the reset cycle when released from being pulled low for more than 1 µs. |+| 7 | A3 | input | Address input that, together with A0-A2, allows access to the 16 bytes of real-time clock and control registers. |+| 8 | A2 | input | Address input that, together with A0, A1 and A3, allows access to the 16 bytes of real-time clock and control registers. |+| 9 | A1 | input | Address input that, together with A0, A2 and A3, allows access to the 16 bytes of real-time clock and control registers. |+| 10 | A0 | input | Address input that, together with A1-A3, allows access to the 16 bytes of real-time clock and control registers. |+| 11 | DQ0 | bidirectional | x8 data bus bit 0 for real-time clock information, connected to the memory data bus. |+| 12 | DQ1 | bidirectional | x8 data bus bit 1 for real-time clock information, connected to the memory data bus. |+| 13 | DQ2 | bidirectional | x8 data bus bit 2 for real-time clock information, connected to the memory data bus. |+| 14 | VSS | power_in | Ground reference for the device. |+| 15 | DQ3 | bidirectional | x8 data bus bit 3 for real-time clock information, connected to the memory data bus. |+| 16 | DQ4 | bidirectional | x8 data bus bit 4 for real-time clock information, connected to the memory data bus. |+| 17 | DQ5 | bidirectional | x8 data bus bit 5 for real-time clock information, connected to the memory data bus. |+| 18 | DQ6 | bidirectional | x8 data bus bit 6 for real-time clock information, connected to the memory data bus. |+| 19 | DQ7 | bidirectional | x8 data bus bit 7 for real-time clock information, connected to the memory data bus. |+| 20 | VSS | power_in | Ground reference for the device (second VSS pin; leave unconnected only in the SNAPHAT DSH package). |+| 21 | CS | input | Chip-select input for the device. |+| 22 | OE | input | Provides the read control for the real-time clock memory locations. |+| 23 | WDI | input | Three-level watchdog input; if held high or low longer than the 1.5-s default time-out, WDO goes low, and leaving it unconnected disables the watchdog (sets mid-supply internally). |+| 24 | BC | power_in | Connect to a 3-V backup cell; a voltage within the VBC range must be present at power-up for proper oscillator start-up. |+| 25 | CEOUT | output | Goes low only when CEIN is low and VCC is above the power-fail threshold; if power fails while CEIN is low, it stays low for 100 µs or until CEIN goes high, whichever occurs first. |+| 26 | CEIN | input | Input to the chip-enable gating circuit that controls CEOUT. |+| 27 | WE | input | Provides the write control for the real-time clock memory locations. |+| 28 | VCC | power_in | 5-V or 3.3-V supply input; the bq4802LY is specified for 2.7 V to 3.6 V in recommended operating conditions. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-28-300mil |+| Category | Clock/Timing |+| Pins | 28 |++## CAD (KiCad official)++- Symbol: `BQ4802LYDW`+- Footprint: `Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm`+- 3D model: SOIC-28-300mil (KiCad packages3D, STEP)+- 3D model files: `bq4802lydw-etched.step` / `bq4802lydw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq4802lydw.step` / `bq4802lydw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq4802ly) (25 pp, sha256 `56b33867dd7e9d2c`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bq4802lydw-datasheet.pdf)
page.jsonadded+321
@@ -0,0 +1,321 @@+{+  "slug": "bq4802lydw",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Real Time Clocks, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "clock-timing",+    "bq4802lydw",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "bq4802lydw.kicad_sym",+    "bq4802lydw.kicad_mod",+    "bq4802lydw.glb",+    "bq4802lydw.step",+    "bq4802lydw.lbr",+    "docs/hero.png",+    "docs/bq4802lydw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "bq4802lydw-hero.glb",+    "bq4802lydw-hero.overlay.json"+  ],+  "component": {+    "mpn": "BQ4802LYDW",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-28-300mil",+    "pin_count": 28,+    "category": "Clock/Timing",+    "subcategory": "Real Time Clocks",+    "datasheet": "https://www.ti.com/cn/lit/gpn/bq4802ly",+    "parts": {+      "symbol": "bq4802lydw.kicad_sym",+      "footprint": "bq4802lydw.kicad_mod",+      "model_3d": "bq4802lydw-hero.glb",+      "model_3d_plain": "bq4802lydw.glb",+      "model_3d_step": "bq4802lydw-etched.step",+      "model_3d_step_plain": "bq4802lydw.step",+      "lbr": "bq4802lydw.lbr"+    },+    "distributor_links": {+      "lcsc": "C1542366",+      "digikey": "2156-BQ4802LYDW-ND",+      "mouser": "595-BQ4802LYDW"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:58:58Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-BQ4802LYDW-ND",+        "status": "found",+        "lifecycle": "Last Time Buy"+      },+      "mouser": {+        "pn": "595-BQ4802LYDW",+        "status": "found",+        "lifecycle": "End of Life"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VOUT",+        "type": "power_out",+        "description": "Provides the higher of VCC or VBC, switched internally, to supply external RAM."+      },+      {+        "number": "2",+        "name": "X1",+        "type": "passive",+        "description": "Crystal connection for the 32.768-kHz quartz crystal."+      },+      {+        "number": "3",+        "name": "X2",+        "type": "passive",+        "description": "Crystal connection for the 32.768-kHz quartz crystal."+      },+      {+        "number": "4",+        "name": "WDO",+        "type": "output",+        "description": "Goes low if WDI remains high or low longer than the watchdog time-out period, returns high on the next WDI transition, and remains high if WDI is unconnected."+      },+      {+        "number": "5",+        "name": "INT",+        "type": "output",+        "description": "Goes low when a power-fail, periodic, or alarm condition occurs; INT is an open-drain output."+      },+      {+        "number": "6",+        "name": "RST",+        "type": "bidirectional",+        "description": "Goes low when VCC falls below the power-fail threshold and stays low for 200 ms (typical) after VCC crosses the threshold on power-up; also accepts a push-button override and re-enters the reset cycle when released from being pulled low for more than 1 µs."+      },+      {+        "number": "7",+        "name": "A3",+        "type": "input",+        "description": "Address input that, together with A0-A2, allows access to the 16 bytes of real-time clock and control registers."+      },+      {+        "number": "8",+        "name": "A2",+        "type": "input",+        "description": "Address input that, together with A0, A1 and A3, allows access to the 16 bytes of real-time clock and control registers."+      },+      {+        "number": "9",+        "name": "A1",+        "type": "input",+        "description": "Address input that, together with A0, A2 and A3, allows access to the 16 bytes of real-time clock and control registers."+      },+      {+        "number": "10",+        "name": "A0",+        "type": "input",+        "description": "Address input that, together with A1-A3, allows access to the 16 bytes of real-time clock and control registers."+      },+      {+        "number": "11",+        "name": "DQ0",+        "type": "bidirectional",+        "description": "x8 data bus bit 0 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "12",+        "name": "DQ1",+        "type": "bidirectional",+        "description": "x8 data bus bit 1 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "13",+        "name": "DQ2",+        "type": "bidirectional",+        "description": "x8 data bus bit 2 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "14",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "15",+        "name": "DQ3",+        "type": "bidirectional",+        "description": "x8 data bus bit 3 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "16",+        "name": "DQ4",+        "type": "bidirectional",+        "description": "x8 data bus bit 4 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "17",+        "name": "DQ5",+        "type": "bidirectional",+        "description": "x8 data bus bit 5 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "18",+        "name": "DQ6",+        "type": "bidirectional",+        "description": "x8 data bus bit 6 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "19",+        "name": "DQ7",+        "type": "bidirectional",+        "description": "x8 data bus bit 7 for real-time clock information, connected to the memory data bus."+      },+      {+        "number": "20",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for the device (second VSS pin; leave unconnected only in the SNAPHAT DSH package)."+      },+      {+        "number": "21",+        "name": "CS",+        "type": "input",+        "description": "Chip-select input for the device."+      },+      {+        "number": "22",+        "name": "OE",+        "type": "input",+        "description": "Provides the read control for the real-time clock memory locations."+      },+      {+        "number": "23",+        "name": "WDI",+        "type": "input",+        "description": "Three-level watchdog input; if held high or low longer than the 1.5-s default time-out, WDO goes low, and leaving it unconnected disables the watchdog (sets mid-supply internally)."+      },+      {+        "number": "24",+        "name": "BC",+        "type": "power_in",+        "description": "Connect to a 3-V backup cell; a voltage within the VBC range must be present at power-up for proper oscillator start-up."+      },+      {+        "number": "25",+        "name": "CEOUT",+        "type": "output",+        "description": "Goes low only when CEIN is low and VCC is above the power-fail threshold; if power fails while CEIN is low, it stays low for 100 µs or until CEIN goes high, whichever occurs first."+      },+      {+        "number": "26",+        "name": "CEIN",+        "type": "input",+        "description": "Input to the chip-enable gating circuit that controls CEOUT."+      },+      {+        "number": "27",+        "name": "WE",+        "type": "input",+        "description": "Provides the write control for the real-time clock memory locations."+      },+      {+        "number": "28",+        "name": "VCC",+        "type": "power_in",+        "description": "5-V or 3.3-V supply input; the bq4802LY is specified for 2.7 V to 3.6 V in recommended operating conditions."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet pin table lists DQ0–DQ7 as type 'I' (input), but they carry data both into and out of ; Pin numbers and names were reconstructed from the page 5 pin-assignment layout (the text extraction ; The datasheet pin text gives '5-V or 3.3-V input' for VCC; the 2.7–3.6 V limit is from the recommend"+        ],+        "pages_sent": 10,+        "cost_usd": 0.0771,+        "at": "2026-10-08T19:58:34"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/bq4802ly",+        "pages": 25,+        "sha256": "56b33867dd7e9d2c",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 28,+        "described": 28,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "bq4802lydw.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.3,+          17.9,+          2.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "b889a13dbe9ec59e79fa9f1b5118b00bfa54f9582392335ff3365b64afc264b1",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "bq4802lydw-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.3,+          17.9,+          2.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "4740a4f5804b3b456501bba63aa681e8e477ce75a68bf4eb756244e11c2d25f1",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file