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BQ29707DSET

Texas Instruments · Battery Management · WSON-6(1.5x1.5)

BQ29707DSET from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection pin, electrically open.
2 COUT output Charge FET gate drive output driven from the BAT supply; it transitions high to low when a fault is detected, and a 5MΩ resistor from COUT to Pack- discharges the gate when the FET is off.
3 DOUT output Discharge FET gate drive output driven from the BAT supply; it transitions high to low when a fault is detected, and a 5MΩ resistor from DOUT to VSS discharges the gate when the FET is off.
4 VSS power_in Cell negative ground reference pin; overcurrent and cell voltage measurement circuits are referenced to this node.
5 BAT power_in Input supply pin connected to the battery pack positive terminal, with a 0.1µF capacitor to ground for noise filtering; the device operating range is BAT - VSS 1.5V to 8V.
6 V- power_in Voltage sense node used with VSS for fault measurements, with a 2.2kΩ resistor connected between this pin and Pack- in the application; the recommended range is BAT - 25V to BAT.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(1.5x1.5)
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage: BAT -0.3 12 V 4
Operating temperature TFUNC -40 85 °C 4
Storage temperature Tstg -55 150 °C 4
Human body model (HBM) ESD, all pins VESD -2000 2000 V per ANSI/ESDA/JEDEC JS-001 4
Charged device model (CDM) ESD, all pins VESD -500 500 V per JEDEC JESD22-C101 4
Positive input voltage: BAT -0.3 8 V 5
Operating temperature TAmb -40 85 °C 5
Storage temperature TS -55 150 °C 5
Lead temperature (soldering 10s) 300 °C soldering 10s 5
Thermal resistance junction to ambient θJA 250 °C/W 5
Junction-to-ambient thermal resistance, high K RθJA 190.5 °C/W High K, DSE (WSON) 12 pins 5
Junction-to-case(top) thermal resistance RθJC(top) 94.9 °C/W DSE (WSON) 12 pins 5
Junction-to-board thermal resistance RθJB 149.3 °C/W DSE (WSON) 12 pins 5
Junction-to-top characterization parameter ψJT 6.4 °C/W DSE (WSON) 12 pins 5
Junction-to-board characterization parameter ψJB 152.8 °C/W DSE (WSON) 12 pins 5
VBAT device operating range, BAT, VSS VBAT 1.5 8 V 5
VBAT device operating range, BAT, V- VBAT 1.5 28 V 5
Current consumption in NORMAL mode INORMAL 4 5.5 µA BAT = 3.8V, V- = 0V 5
Charge FET low output VOL 0.4 0.5 V IOL = 30µA, BAT = 3.8V 5
Charge FET high output VOH 3.4 3.7 V IOH = -30µA, BAT = 3.8V 5
Discharge FET low output VOL 0.2 0.5 V IOL = 30µA, BAT = 2V 5
Discharge FET high output VOH 3.4 3.7 V IOH = -30µA, BAT = 3.8V 5
Resistance between V- and VBAT RV-D 100 300 550 kΩ VBAT = 1.8V, V- = 0V 5
Current sink on V- to VSS IV-S 8 24 µA VBAT = 3.8V 5
Overcharge detection voltage VOVP -10 10 mV Factory config 3.85V to 4.60V in 50mV steps; TA = 25°C 6
Overcharge detection voltage VOVP -20 20 mV Factory config 3.85V to 4.60V in 50mV steps; TA = 0°C to 60°C 6
Overcharge release hysteresis voltage VOVP-Hys -20 20 mV 100mV and (VSS, V-) > OCC (min) for release, TA = 25°C 6
Over-discharge detection voltage VUVP -50 50 mV Factory config 2.00V to 2.80V in 50mV steps, TA = 25°C 6
Over-discharge release hysteresis voltage VUVP+Hys -50 50 mV 100mV and (BAT, V-) > 1V for release, TA = 25°C 6
Discharging overcurrent detection voltage VOCD -10 10 mV Factory config 90mV to 200mV in 5mV steps; TA = 25°C 6
Discharging overcurrent detection voltage VOCD -15 15 mV TA = -40°C to 85°C 6
Charging overcurrent detection voltage VOCC -10 10 mV Factory config -45mV to -155mV in 5mV steps; TA = 25°C 6
Charging overcurrent detection voltage VOCC -15 15 mV TA = -40°C to 85°C 6
Short circuit detection voltage VSCC -100 100 mV Factory config 300mV, 400mV, 500mV, 600mV; TA = 25°C 6
Overcharge detection delay time tOVPD -20 20 % Factory config 0.25s, 1s, 1.25s, 4.5s 6
Over-discharge detection delay time tUVPD -20 20 % Factory config 20ms, 96ms, 125ms, 144ms 6
Discharging overcurrent detection delay time tOCDD -20 20 % Factory config 8ms, 16ms, 20ms, 48ms 6
Charging overcurrent detection delay time tOCCD -20 20 % Factory config 4ms, 6ms, 8ms, 16ms 6
Short circuit detection delay time tSCCD -50 50 % 250µs (fixed) 6

CAD (KiCad official)

  • Symbol: BQ29707DSET
  • Footprint: Package_SON:WSON-6_1.5x1.5mm_P0.5mm
  • 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
  • 3D model files: bq29707dset-etched.step / bq29707dset-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq29707dset.step / bq29707dset.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 011527de4b541f4c, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF