component
BQ294701DSGR
Public Made by Adomby adom
Texas Instruments Battery Management, WSON-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ294701DSGR
Texas Instruments · Battery Management · WSON-8-EP(2x2)
BQ294701DSGR from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Unregulated IC supply input, recommended 3 V to 20 V (VDD-VSS) with absolute maximum 30 V; a series resistor limits current and a capacitor to ground filters noise. |
| 2 | V4 | input | Sense input for the positive voltage of the fourth (top) cell in the stack, with recommended input range 0 V to 5 V and absolute maximum of 30 V; requires a series RC filter at the input. |
| 3 | V3 | input | Sense input for the positive voltage of the third cell from the bottom, with recommended input range 0 V to 5 V and absolute maximum of 30 V; requires a series RC filter at the input. |
| 4 | V2 | input | Sense input for the positive voltage of the second cell from the bottom, with recommended input range 0 V to 5 V and absolute maximum of 30 V; requires a series RC filter at the input. |
| 5 | V1 | input | Sense input for the positive voltage of the bottom cell in the stack, with recommended input range 0 V to 5 V and absolute maximum of 30 V; requires a series RC filter at the input. |
| 6 | VSS | power_in | IC ground, connected to the negative terminal of the bottom cell; absolute maximum rating −0.3 V to 30 V relative to VSS for the other pins. |
| 7 | CD | output | External delay capacitor connection that sets the overvoltage delay tCD = K × CCD (K = 10 to 20 s/µF, so 0.1 µF gives 1 s to 2 s); shorting CD to VSS enables the customer test mode with delay of 170 ms maximum. |
| 8 | OUT | output | Overvoltage fault signal output, factory-set as CMOS active-high or open-drain active-low; the open-drain version requires an external pull-up resistor and absolute maximum is 30 V to VSS. |
| 9 | PowerPAD | power_in | Exposed thermal pad that TI recommends connecting to VSS on the PCB and that must be soldered to the board for thermal and mechanical performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
BQ294701DSGR - Footprint:
Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm - 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
bq294701dsgr-etched.step/bq294701dsgr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq294701dsgr.step/bq294701dsgr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
0bb66de94396f561, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).