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BQ294512DRVT

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Texas Instruments Battery Management, WSON-6-EP(2x2). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs bq294512drvt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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bq294512drvt-etched.fit.json bq294512drvt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bq294512drvt-etched.glb bq294512drvt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bq294512drvt-etched.step bq294512drvt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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page.json bq294512drvt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md bq294512drvt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

BQ294512DRVT

Texas Instruments · Battery Management · WSON-6-EP(2x2)

BQ294512DRVT from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V3 input Sense input for the positive terminal of the third (top) cell in the stack. Analog cell-voltage sense; input current <100 nA typical. Absolute max V3-VSS = 30 V; V3-V2 = 8 V max. Recommended operating range V3-V2 = 0 V to 5 V.
2 V2 input Sense input for the positive terminal of the second (middle) cell in the stack. Analog cell-voltage sense; input current <100 nA typical. Absolute max V2-VSS = 30 V; V2-V1 = 8 V max.
3 VSS power_in IC ground; electrically connected to the negative terminal of the lowest cell (Pack-). Must be tied to the exposed thermal PWRPAD on the PCB for proper operation.
4 V1 input Sense input for the positive terminal of the lowest (bottom) cell in the stack. Analog cell-voltage sense; input current <100 nA typical. Absolute max V1-VSS = 30 V; recommended V1-VSS = 0 V to 5 V.
5 VDD power_in Device supply voltage referenced to VSS. Recommended operating range 3 V to 25 V; absolute max VDD-VSS = 30 V. Typical ICC ≈ 1 µA when all cells are below VPROTECT.
6 OUT output Analog output drive for an external N-channel FET (secondary-protection blow-fuse/disconnect). Drives high when any monitored cell exceeds VOV for the fixed tDELAY (4 s for BQ294512). VOH ≥ 6 V at IOH = 100 µA with VDD = 7.2 V; short-circuit current ≈ 4.5 mA; output impedance 2-5 kΩ; rise time ≈5 µs with CL = 1 nF. Absolute max OUT-VSS = 30 V.
PAD PWRPAD passive Exposed thermal pad on the bottom of the SON-6 (DRV) package. Must be connected to VSS (pin 3) on the PCB for proper device operation and thermal performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Ordering variants

Same part, different packaging or reel option.

  • BQ294512DRVT
  • BQ294512DRVTDRVR

CAD (KiCad official)

  • Symbol: BQ294512DRVT
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: bq294512drvt-etched.step / bq294512drvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq294512drvt.step / bq294512drvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 eb0ec53937b85099, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF