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BQ25890HRTWR
Public Made by Adomby adom
Texas Instruments Battery Management, WQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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BQ25890HRTWR
Texas Instruments · Battery Management · WQFN-24(4x4)
BQ25890HRTWR from Texas Instruments, in a WQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; place a 1-µF ceramic capacitor from VBUS to PGND as close to the IC as possible, and the RBFET connects VBUS to PMID. |
| 2 | D+ | bidirectional | Positive line of the USB data pair used for D+/D- host and charging port detection, which can be configured as an output driver by DP_DAC when a source is plugged in or in OTG mode. |
| 3 | D- | bidirectional | Negative line of the USB data pair used for D+/D- host and charging port detection, which can be configured as an output driver by DM_DAC when a source is plugged in or in OTG mode. |
| 4 | STAT | output | Open-drain charge status output that goes LOW during charge in progress and HIGH for charge complete or charge disabled, connected to the pull-up rail via 10 kΩ. |
| 5 | SCL | input | I2C interface clock input that connects to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data line that connects to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that sends an active-low 256-µs pulse to the host to report charger status and faults, connected to a logic rail via 10 kΩ. |
| 8 | OTG | input | Active-high enable pin for boost mode, which is activated when OTG_CONFIG = 1 and the OTG pin is high. |
| 9 | CE | input | Active-low charge enable pin; battery charging is enabled when CHG_CONFIG = 1 and CE is low, and CE must be pulled high or low. |
| 10 | ILIM | input | Input current limit pin that regulates ILIM at 0.8 V with a resistor to ground setting IINMAX = KILIM/RILIM, and can also monitor input current below 0.8 V. |
| 11 | TS | input | Temperature qualification input for an NTC thermistor, with a resistor divider from REGN to TS to GND; charge suspends when TS is out of range. |
| 12 | QON | input | BATFET enable/reset control input with an internal pull-up; a logic low of about 1 s exits ship mode and about 15 s resets system power when VBUS is not plugged in. |
| 13 | BAT | power_in | Battery connection point to the positive battery terminal, with the internal BATFET connected between BAT and SYS; connect 10 µF close to the BAT pin. |
| 14 | BAT | power_in | Battery connection point to the positive battery terminal, with the internal BATFET connected between BAT and SYS; connect 10 µF close to the BAT pin. |
| 15 | SYS | power_out | System connection point; the switch-mode converter keeps SYS above the minimum system voltage (default 3.5 V) when the battery falls below it; connect 20 µF close to the SYS pin. |
| 16 | SYS | power_out | System connection point; the switch-mode converter keeps SYS above the minimum system voltage (default 3.5 V) when the battery falls below it; connect 20 µF close to the SYS pin. |
| 17 | PGND | power_in | Power ground connection for the high-current converter node, connected internally to the source of the LSFET and to be tied with a single-point connection to analog GND. |
| 18 | PGND | power_in | Power ground connection for the high-current converter node, connected internally to the source of the LSFET and to be tied with a single-point connection to analog GND. |
| 19 | SW | passive | Switching node connecting to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 20 | SW | passive | Switching node connecting to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | passive | PWM high-side driver positive supply, connected to the bootstrap diode anode, with the 0.047-µF bootstrap capacitor connected from SW. |
| 22 | REGN | power_out | PWM low-side driver positive supply output and bias rail of TS; connect a 4.7-µF (10 V rated) ceramic capacitor from REGN to analog GND close to the IC. |
| 23 | PMID | passive | Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of HSFET; the rest of the input capacitance is placed from PMID to PGND after 1 µF on VBUS. |
| 24 | DSEL | output | Active-high D+/D- multiplexer selection control that is normally low and drives high during input source type detection; connect a 47-nF (6 V rated) capacitor from DSEL to analog GND. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 3.9 | 14 | V | 6 | ||
| Input current (VBUS) | IIN | 3.25 | A | 6 | |||
| Output current (SW) | ISYS | 5 | A | 6 | |||
| Fast charging current | IBAT | 5 | A | 6 | |||
| Discharging current with internal MOSFET, continuous | IBAT | 6 | A | continuous | 6 | ||
| Discharging current with internal MOSFET, peak | IBAT | 9 | A | up to 1 sec duration | 6 | ||
| Operating free-air temperature range | TA | -40 | 85 | °C | 6 | ||
| VBUS voltage | VBUS | -2 | 22 | V | converter not switching | 6 | |
| PMID voltage | PMID | -0.3 | 22 | V | converter not switching | 6 | |
| STAT voltage | STAT | -0.3 | 20 | V | 6 | ||
| DSEL voltage | DSEL | -0.3 | 7 | V | 6 | ||
| BTST voltage | BTST | -0.3 | 20 | V | 6 | ||
| SW voltage | SW | -2 | 16 | V | 6 | ||
| SW voltage peak | SW | -3 | 16 | V | peak for 10 ns duration | 6 | |
| BAT, SYS voltage | BAT, SYS | -0.3 | 6 | V | converter not switching | 6 | |
| SDA, SCL, INT, OTG, REGN, TS, CE, QON voltage | -0.3 | 7 | V | 6 | |||
| D+, D- voltage | D+, D- | -0.3 | 7 | V | 6 | ||
| BTST to SW voltage | BTST TO SW | -0.3 | 7 | V | 6 | ||
| PGND to GND voltage | PGND to GND | -0.3 | 0.3 | V | 6 | ||
| ILIM voltage | ILIM | -0.3 | 5 | V | 6 | ||
| Output sink current INT, STAT | 6 | mA | 6 | ||||
| Output sink current DSEL | 2 | mA | 6 | ||||
| Junction temperature | -40 | 150 | °C | 6 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 6 | ||
| Battery discharge current (BAT, SW, SYS) in buck mode, leakage | IBAT | 5 | µA | VBAT = 4.2 V, V(VBUS) < V(UVLO), leakage between BAT and VBUS | 7 | ||
| Battery discharge current in High-Z mode, BATFET disabled | IBAT | 12 | 23 | µA | High-Z mode, no VBUS, BATFET disabled (REG09[5]=1), battery monitor disabled, TJ < 85°C | 7 | |
| Battery discharge current in High-Z mode, BATFET enabled | IBAT | 32 | 60 | µA | High-Z mode, no VBUS, BATFET enabled (REG09[5]=0), battery monitor disabled, TJ < 85°C | 7 | |
| Input supply current (VBUS) in High-Z mode | I(VBUS_HIZ) | 15 | 35 | µA | V(VBUS)= 5 V, High-Z mode, no battery, battery monitor disabled | 7 | |
| Input supply current (VBUS) converter not switching | I(VBUS) | 1.5 | 3 | mA | VBUS > V(UVLO), VBUS > VBAT, converter not switching | 7 | |
| Battery discharge current in boost mode, PFM_OTG_DIS=1 | I(BOOST) | 15 | mA | VBAT = 4.2 V, boost mode, I(VBUS)= 0 A, converter switching, PFM_OTG_DIS=1 | 7 | ||
| VBUS operating range | V(VBUS_OP) | 3.9 | 14 | V | 7 | ||
| Sleep mode falling threshold | V(SLEEP) | 25 | 65 | 120 | mV | 7 | |
| Sleep mode rising threshold | V(SLEEPZ) | 130 | 250 | 370 | mV | 7 | |
| VBUS over-voltage rising threshold | V(ACOV) | 14 | 14.6 | V | 7 | ||
| Battery depletion falling threshold | VBAT(DPL) | 2.15 | 2.5 | V | 7 | ||
| Minimum DC system voltage output | VSYS(MIN) | 3.5 | 3.65 | V | VBAT< VSYS(MIN), SYS_MIN = 3.5 V (REG03[3:1]=101), ISYS= 0 A | 7 | |
| Maximum DC system voltage output | VSYS(MAX) | 4.4 | 4.42 | V | VBAT = 4.35 V, SYS_MIN = 3.5V (REG03[3:1]=101), ISYS= 0 A | 7 | |
| Top reverse blocking MOSFET (RBFET) on-resistance, TJ -40 to 85°C | RON(RBFET) | 27 | 38 | mΩ | TJ = -40°C to +85°C | 8 | |
| Top reverse blocking MOSFET (RBFET) on-resistance, TJ -40 to 125°C | RON(RBFET) | 27 | 44 | mΩ | TJ = -40°C to +125°C | 8 | |
| Top switching MOSFET (HSFET) on-resistance, TJ -40 to 85°C | RON(HSFET) | 27 | 39 | mΩ | TJ = -40°C to +85°C | 8 | |
| Top switching MOSFET (HSFET) on-resistance, TJ -40 to 125°C | RON(HSFET) | 27 | 47 | mΩ | TJ = -40°C to +125°C | 8 | |
| Bottom switching MOSFET (LSFET) on-resistance, TJ -40 to 85°C | RON(LSFET) | 16 | 24 | mΩ | TJ = -40°C to +85°C | 8 | |
| Bottom switching MOSFET (LSFET) on-resistance, TJ -40 to 125°C | RON(LSFET) | 16 | 28 | mΩ | TJ = -40°C to +125°C | 8 | |
| SYS-BAT MOSFET (BATFET) on-resistance, TJ 25°C | RON(BATFET) | 11 | 13 | mΩ | TJ = 25°C | 8 | |
| Typical charge voltage range | VBAT(REG_RANGE) | 3.84 | 4.608 | V | 8 | ||
| Charge voltage resolution accuracy | VBAT(REG) | -0.5 | 0.5 | % | VBAT = 4.208 V (REG06[7:2]=010111) or VBAT = 4.352 V (REG06[7:2]=100000), TJ = -40°C to +85°C | 8 | |
| Typical fast charge current regulation range | I(CHG_REG_RANGE) | 0 | 5056 | mA | 8 | ||
| Fast charge current regulation accuracy at 128 mA | I(CHG_REG_ACC) | -20 | 20 | % | VBAT = 3.1 V or 3.8 V, ICHG = 128 mA, TJ = -40°C to +85°C | 8 | |
| Fast charge current regulation accuracy at 1792 mA | I(CHG_REG_ACC) | -5 | 5 | % | VBAT= 3.1 V or 3.8 V, ICHG=1792 mA, TJ = -40°C to +85°C | 8 | |
| Typical input voltage regulation range | VIN(DPM_RANGE) | 3.9 | 15.3 | V | 8 | ||
| Input voltage regulation accuracy | VIN(DPM_ACC) | -3 | 3 | % | VINDPM = 4.4 V, 9 V, TJ = -40°C to +105°C | 8 | |
| Typical input current regulation range | IIN(DPM_RANGE) | 100 | 3250 | mA | 8 | ||
| Input current 100-mA regulation accuracy | IIN(DPM100_ACC) | 85 | 90 | 100 | mA | VBAT = 5 V, current pulled from SW, IINLIM (REG00[5:0]) =100 mA | 8 |
| Input current regulation accuracy, Adapter 1.5 A | IIN(DPM_ACC) | 1300 | 1400 | 1500 | mA | VBAT = 5 V, current pulled from SW, Adapter 1.5 A, IINLIM (REG00[5:0]) = 1500 mA | 8 |
| Boost mode typical regulation voltage range | V(OTG_REG_RANGE) | 4.55 | 5.55 | V | 10 | ||
| Boost mode over-voltage threshold | V(OTG_OVP) | 5.8 | 6 | V | Rising threshold | 10 | |
| REGN LDO output voltage | V(REGN) | 5.6 | 6 | 6.4 | V | V(VBUS) = 9 V, I(REGN) = 40 mA | 11 |
| RBFET thermal resistance junction-to-ambient | RθJA | 31.8 | °C/W | 7 | |||
| Junction-to-top thermal resistance | RθJC(top) | 27.9 | °C/W | 7 | |||
| Junction-to-board thermal resistance | RθJB | 8.7 | °C/W | 7 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 2 | °C/W | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 1. Place input capacitor as close as possible to PMID pin and GND pin connections and use shortest copper | 57 |
CAD (KiCad official)
- Symbol:
BQ25890HRTWR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: WQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq25890hrtwr-etched.step/bq25890hrtwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq25890hrtwr.step/bq25890hrtwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (67 pp, sha256
958a42a1243e448f, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).