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BQ25731RSNR
Public Made by Adomby adom
Texas Instruments Battery Management, QFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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BQ25731RSNR
Texas Instruments · Battery Management · QFN-32(4x4)
BQ25731RSNR from Texas Instruments, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; an input low-pass filter of 1 Ω and 0.47 µF (minimum) is recommended. |
| 2 | ACN | input | Input current sense amplifier negative input whose leakage is matched to ACP, requiring an RC low-pass filter between the sense resistor and the pin to suppress high-frequency noise. |
| 3 | ACP | input | Input current sense amplifier positive input whose leakage is matched to ACN, requiring an RC low-pass filter between the sense resistor and the pin to suppress high-frequency noise. |
| 4 | CHRG_OK | output | Open-drain active-high indicator that goes HIGH after a 50-ms deglitch when VBUS is between 3.5 V and 25.8 V, requires a 10-kΩ pull-up, and goes LOW when VBUS is below 3.2 V or above 26.8 V or on listed faults. |
| 5 | OTG/VAP/FRS | input | Active-high pin that enables OTG mode when OTG_VAP_MODE=1b and EN_OTG=1b, or FRS forward-operation mode when OTG_VAP_MODE=1b and EN_FRS=1b. |
| 6 | ILIM_HIZ | input | Input current limit setting pin driven by a resistor divider from VDDA, where V(ILIM_HIZ) = 1 V + 40 × IDPM × Rac; below 0.4 V the device enters HIZ mode and above 0.8 V it exits HIZ mode. |
| 7 | VDDA | power_in | Internal reference bias pin; connect a 10-Ω resistor from REGN to VDDA and a 1-µF ceramic capacitor from VDDA to power ground. |
| 8 | IADPT | output | Adapter current monitor output with VIADPT = 20 or 40 × (VACP - VACN), clamped below 3.3 V, also used to program the inductance through a resistor to ground and decoupled by 100 pF or less. |
| 9 | IBAT | output | Battery current monitor output with VIBAT = 8 or 16 × (VSRP - VSRN) for charge current, clamped below 3.3 V, with 100 pF or less decoupling and may be left floating if unused. |
| 10 | PSYS | output | Current-mode system power monitor whose output is proportional to total adapter and battery power, with output voltage clamped at 3.3 V and a parallel filter capacitor recommended. |
| 11 | PROCHOT | output | Active-low open-drain output that pulses when a monitored adapter current, battery discharge current, or system voltage event triggers, with minimum pulse width set by PROCHOT_WIDTH. |
| 12 | SDA | bidirectional | I2C open-drain data I/O that requires a 10-kΩ pull-up resistor according to I2C specifications. |
| 13 | SCL | input | I2C clock input connected to the host controller or smart battery clock line, requiring a 10-kΩ pull-up resistor according to specifications. |
| 14 | CMPIN | input | Input of the independent comparator compared against an internal reference; with CMP_POL=1b a resistor between CMPIN and CMPOUT sets hysteresis, with CMP_POL=0b internal hysteresis is 100 mV, and the pin should be tied to ground if unused. |
| 15 | CMPOUT | output | Open-drain output of the independent comparator that requires a pull-up resistor to a supply rail and should be floated if the comparator is not used. |
| 16 | COMP1 | input | Buck-boost converter compensation pin 1 that requires the RC network described in section 9.3.12. |
| 17 | COMP2 | input | Buck-boost converter compensation pin 2 that requires the RC network described in section 9.3.12. |
| 18 | CELL_BATPRESZ | input | Battery cell-count selection pin biased from VDDA through a resistor divider that also sets SYSOVP thresholds (5 V for 1-cell, 12 V for 2-cell, 19.5 V for 3/4-cell, 25 V for 5-cell), allows no external capacitor, and is pulled below VCELL_BATPRESZ_FALL on battery removal. |
| 19 | SRN | input | Charge current sense amplifier negative input that also senses battery voltage, requiring a 0.1-µF filter capacitor across the battery sense resistor and a 10-Ω contact resistor to the pin. |
| 20 | SRP | input | Charge current sense amplifier positive input requiring a 0.1-µF filter capacitor across the battery sense resistor and a 10-Ω contact resistor to the pin, with leakage matched to SRN. |
| 21 | NC | unconnected | Not in use; this pin must be left floating. |
| 22 | VSYS | input | Charger system voltage sensing input. |
| 23 | SW2 | passive | Boost-mode switching node connected to the source of the boost half-bridge high-side n-channel MOSFET. |
| 24 | HIDRV2 | output | Boost-mode high-side MOSFET (Q4) gate driver output connected to the high-side n-channel MOSFET gate. |
| 25 | BTST2 | power_out | Boost-mode high-side driver bootstrap supply; connect a 0.047-µF capacitor between SW2 and BTST2, with the bootstrap diode from REGN integrated. |
| 26 | LODRV2 | output | Boost-mode low-side MOSFET (Q3) gate driver output connected to the low-side n-channel MOSFET gate. |
| 27 | PGND | power_in | Device power ground. |
| 28 | REGN | power_out | 6-V linear regulator output supplied from VBUS or VSYS, active when VBUS is above VVBUS_CONVEN, requiring a 2.2- or 3.3-µF ceramic capacitor to power ground and used for power-stage gate drive. |
| 29 | LODRV1 | output | Buck-mode low-side MOSFET (Q2) gate driver output connected to the low-side n-channel MOSFET gate. |
| 30 | BTST1 | power_out | Buck-mode high-side driver bootstrap supply; connect a 0.047-µF capacitor between SW1 and BTST1, with the bootstrap diode from REGN integrated. |
| 31 | HIDRV1 | output | Buck-mode high-side MOSFET (Q1) gate driver output connected to the high-side n-channel MOSFET gate. |
| 32 | SW1 | passive | Buck-mode switching node connected to the source of the buck half-bridge high-side n-channel MOSFET. |
| 33 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-32(4x4) |
| Category | Power Management (PMIC) |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage: SRN, SRP, ACN, ACP, VBUS, VSYS | -0.3 | 32 | V | Over operating free-air temperature range | 8 | ||
| Voltage: SW1, SW2 | -2 | 32 | V | Over operating free-air temperature range | 8 | ||
| Voltage: BTST1, BTST2, HIDRV1, HIDRV2 | -0.3 | 38 | V | Over operating free-air temperature range | 8 | ||
| Voltage: SDA, SCL, REGN, PSYS, CHRG_OK, CELL_BATPRESZ, ILIM_HIZ, LODRV1, LODRV2, VDDA, COMP2, CMPIN, CMPOUT, OTG/VAP/FRS | -0.3 | 7 | V | Over operating free-air temperature range | 8 | ||
| Voltage: PROCHOT | -0.3 | 5.5 | V | Over operating free-air temperature range | 8 | ||
| Voltage: IADPT, IBAT, COMP1 | -0.3 | 3.6 | V | Over operating free-air temperature range | 8 | ||
| Differential voltage: BTST1-SW1, BTST2-SW2, HIDRV1-SW1, HIDRV2-SW2 | -0.3 | 7 | V | Over operating free-air temperature range | 8 | ||
| Differential voltage: SRP-SRN, ACP-ACN | -0.5 | 0.5 | V | Over operating free-air temperature range | 8 | ||
| Junction temperature range | TJ | -40 | 150 | °C | Over operating free-air temperature range | 8 | |
| Storage temperature | Tstg | -55 | 150 | °C | Over operating free-air temperature range | 8 | |
| Voltage 25 ns transient: LODRV1, LODRV2 | -4 | 7 | V | 25 ns | 8 | ||
| Voltage 25 ns transient: HIDRV1, HIDRV2 | -4 | 38 | V | 25 ns | 8 | ||
| Voltage 25 ns transient: SW1, SW2 | -4 | 32 | V | 25 ns | 8 | ||
| Voltage: ACN, ACP, VBUS | 0 | 26 | V | Operating free-air temperature range | 8 | ||
| Voltage: SRN, SRP, VSYS | 0 | 23.15 | V | Operating free-air temperature range | 8 | ||
| Voltage: SW1, SW2 | -2 | 26 | V | Operating free-air temperature range | 8 | ||
| Voltage: BTST1, BTST2, HIDRV1, HIDRV2 | 0 | 32 | V | Operating free-air temperature range | 8 | ||
| Voltage: SDA, SCL, REGN, PSYS, CHRG_OK, CELL_BATPRESZ, ILIM_HIZ, LODRV1, LODRV2, VDDA, COMP2, CMPIN, CMPOUT, OTG/VAP/FRS | 0 | 6.5 | V | Operating free-air temperature range | 8 | ||
| Voltage: PROCHOT | 0 | 5.3 | V | Operating free-air temperature range | 8 | ||
| Voltage: IADPT, IBAT, COMP1 | 0 | 3.3 | V | Operating free-air temperature range | 8 | ||
| Differential voltage: BTST1-SW1, BTST2-SW2, HIDRV1-SW1, HIDRV2-SW2 | 0 | 6.5 | V | Operating free-air temperature range | 8 | ||
| Differential voltage: SRP-SRN, ACP-ACN | -0.5 | 0.5 | V | Operating free-air temperature range | 8 | ||
| Voltage: BATDRV-VSYS | 0 | 10.8 | V | Operating free-air temperature range | 8 | ||
| Junction temperature range | TJ | -20 | 125 | °C | Operating free-air temperature range | 9 | |
| Storage temperature | Tstg | -20 | 85 | °C | Operating free-air temperature range | 9 | |
| Input voltage operating range | VINPUT_OP | 3.5 | 26 | V | 9 | ||
| Battery voltage regulation | VBAT_RNG | 1.024 | 23 | V | 9 | ||
| Battery voltage regulation accuracy (0°C to 85°C) | VBAT_REG_ACC | -0.5 | 0.5 | % | 0°C to 85°C; REG0x05/04() = 0x5208H (21 V) | 9 | |
| Battery voltage regulation accuracy (0°C to 85°C) | VBAT_REG_ACC | -0.6 | 0.6 | % | 0°C to 85°C; REG0x05/04() = 0x20D0H (8.4 V) | 9 | |
| Battery voltage regulation accuracy (0°C to 85°C) | VBAT_REG_ACC | -1.1 | 1.45 | % | 0°C to 85°C; REG0x05/04() = 0x1068H (4.2 V) | 9 | |
| Charge current regulation accuracy (5-mΩ RSR, 0°C to 85°C) | ICHRG_REG_ACC | -3 | 3 | % | 5-mΩ RSR sensing resistor, VBAT above VSYS_MIN; REG0x03/02() = 0x1000H (8192 mA) | 10 | |
| Charge current regulation accuracy (5-mΩ RSR, 0°C to 85°C) | ICHRG_REG_ACC | -5 | 6 | % | 5-mΩ RSR sensing resistor, VBAT above VSYS_MIN; REG0x03/02() = 0x0800H (4096 mA) | 10 | |
| Charge current regulation accuracy (5-mΩ RSR, 0°C to 85°C) | ICHRG_REG_ACC | -12 | 13.5 | % | 5-mΩ RSR sensing resistor, VBAT above VSYS_MIN; REG0x03/02() = 0x0400H (2048 mA) | 10 | |
| Charge current regulation accuracy (5-mΩ RSR, 0°C to 85°C) | ICHRG_REG_ACC | -18 | 21.5 | % | 5-mΩ RSR sensing resistor, VBAT above VSYS_MIN; REG0x03/02() = 0x0200H (1024 mA) | 10 | |
| Input current regulation accuracy (-40°C to 105°C, 5-mΩ RAC) | IIIN_DPM_REG_ACC | 7600 | 7800 | 8000 | mA | -40°C to 105°C; 5-mΩ RAC sensing resistor; REG0x0F/0E() = 0x4E00H | 10 |
| Input current regulation accuracy (-40°C to 105°C, 5-mΩ RAC) | IIIN_DPM_REG_ACC | 5600 | 5800 | 6000 | mA | -40°C to 105°C; 5-mΩ RAC sensing resistor; REG0x0F/0E() = 0x3A00H | 10 |
| Input current regulation accuracy (-40°C to 105°C, 5-mΩ RAC) | IIIN_DPM_REG_ACC | 2600 | 2800 | 3000 | mA | -40°C to 105°C; 5-mΩ RAC sensing resistor; REG0x0F/0E() = 0x1C00H | 10 |
| Input current regulation accuracy (-40°C to 105°C, 5-mΩ RAC) | IIIN_DPM_REG_ACC | 600 | 800 | 1000 | mA | -40°C to 105°C; 5-mΩ RAC sensing resistor; REG0x0F/0E() = 0x0800H | 10 |
| Input voltage regulation accuracy | VDPM_REG_ACC | -3.5 | 2 | % | REG0x0B/0A()=0x3C80H (18688 mV) | 10 | |
| Input voltage regulation accuracy | VDPM_REG_ACC | -4.5 | 3 | % | REG0x0B/0A()=0x1E00H (10880 mV) | 10 | |
| Input voltage regulation accuracy | VDPM_REG_ACC | -8 | 5.5 | % | REG0x0B/0A()=0x0500H (4480 mV) | 10 | |
| OTG voltage regulation accuracy (OOA disabled) | VOTG_REG_ACC | -2 | 2 | % | REG0x07/06()=0x2CECH (23.00 V) | 11 | |
| OTG voltage regulation accuracy (OOA disabled) | VOTG_REG_ACC | -4 | 3.5 | % | REG0x07/06()=0x09C4H (5.00 V) | 11 | |
| OTG output current regulation accuracy (100-mA LSB, 5-mΩ ACP/ACN) | IOTG_ACC | 5600 | 6000 | 6400 | mA | 100-mA LSB, 5-mΩ ACP/ACN series resistor; REG0x09/08() = 0x3C00H | 11 |
| OTG output current regulation accuracy (100-mA LSB, 5-mΩ ACP/ACN) | IOTG_ACC | 2600 | 3000 | 3400 | mA | 100-mA LSB, 5-mΩ ACP/ACN series resistor; REG0x09/08() = 0x1E00H | 11 |
| OTG output current regulation accuracy (100-mA LSB, 5-mΩ ACP/ACN) | IOTG_ACC | 600 | 1000 | 1400 | mA | 100-mA LSB, 5-mΩ ACP/ACN series resistor; REG0x09/08() = 0x0A00H | 11 |
| REGN regulator voltage (0 mA, 60 mA) | VREGN_REG | 5.7 | 6 | 6.3 | V | VVBUS = 10 V | 11 |
| PWM switching frequency | FSW | 680 | 800 | 920 | kHz | Reg0x01[1] = 0 | 16 |
| PWM switching frequency | FSW | 340 | 400 | 460 | kHz | Reg0x01[1] = 1 | 16 |
| VBUS overvoltage rising threshold | VVBUSOV_RISE | 26 | 26.8 | 27.7 | V | VBUS rising | 14 |
| VBUS overvoltage falling threshold | VVBUSOV_FALL | 25 | 25.8 | 26.7 | V | VBUS falling | 14 |
| Thermal resistance junction-to-ambient (JEDEC) | RθJA | 37.2 | °C/W | 9 | |||
| Thermal resistance junction-to-case (top) | RθJC(top) | 26.1 | °C/W | 9 | |||
| Thermal resistance junction-to-board | RθJB | 7.8 | °C/W | 9 | |||
| Junction-to-top characterization parameter | ΨJT | 0.3 | °C/W | 9 | |||
| Junction-to-board characterization parameter | ΨJB | 7.8 | °C/W | 9 | |||
| Thermal resistance junction-to-case (bottom) | RθJC(bot) | 2.3 | °C/W | 9 |
CAD (KiCad official)
- Symbol:
BQ25731RSNR - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq25731rsnr-etched.step/bq25731rsnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq25731rsnr.step/bq25731rsnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (103 pp, sha256
f4c1b09117e36158, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).