BQ25611DRTWT

Texas Instruments · Battery Management · WQFN-24(4x4)

BQ25611DRTWT from Texas Instruments, in a WQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VAC	power_in	Input voltage sensing pin that must be tied to VBUS.
2	D+	bidirectional	Positive USB data line used for D+/D- based host and charging port detection, including DCD, BC1.2 primary and secondary detection, and nonstandard adapters.
3	D-	bidirectional	Negative USB data line used for D+/D- based host and charging port detection, including DCD, BC1.2 primary and secondary detection, and nonstandard adapters.
4	STAT	output	Open-drain charger status output that is LOW during charge in progress, HIGH when charge is complete or in SLEEP mode, and blinks at 1 Hz on charge suspend fault; connect to a logic rail through 10 kΩ.
5	SCL	input	I2C interface clock input that must be connected to the logic rail through a 10-kΩ resistor.
6	SDA	bidirectional	I2C interface data line that must be connected to the logic rail through a 10-kΩ resistor.
7	INT	output	Open-drain interrupt output that must be connected to a logic rail through 10 kΩ and sends an active-low 256 µs pulse to report charger status and faults.
8	NC	unconnected	Not connected.
9	CE	input	Charge enable input where battery charging is enabled when the pin is driven LOW.
10	BATSNS	input	Battery voltage sense input for charge voltage regulation, which should be connected to the positive battery terminal; if open or shorted to ground, BATSNS_STAT is set and the charger regulates through BAT.
11	TS	input	Battery temperature qualification input for an NTC thermistor, where charge and boost mode are suspended when the TS voltage is out of range.
12	QON	input	BATFET enable/reset control input with an internal 6.5 V clamp, where a LOW of tSHIPMODE exits ship mode and a LOW of tQON_RST (minimum 8 s) resets the system by turning BATFET off for tBATFET_RST (minimum 250 ms).
13	BAT	power_out	Battery connection to the positive terminal of the battery pack, with the internal current sense resistor between SYS and BAT; connect a 10 µF capacitor closely to this pin.
14	BAT	power_out	Battery connection to the positive terminal of the battery pack, with the internal current sense resistor between SYS and BAT; connect a 10 µF capacitor closely to this pin.
15	SYS	power_out	System output connection point with the internal current sense resistor between SYS and BAT; connect a 10 µF (min) capacitor closely to this pin.
16	SYS	power_out	System output connection point with the internal current sense resistor between SYS and BAT; connect a 10 µF (min) capacitor closely to this pin.
17	GND	power_in	Ground reference for the device.
18	GND	power_in	Ground reference for the device.
19	SW	passive	Switching node connecting to the output inductor, internally connected to the source of HSFET and drain of LSFET; connect the 0.047 µF bootstrap capacitor from SW to BTST.
20	SW	passive	Switching node connecting to the output inductor, internally connected to the source of HSFET and drain of LSFET; connect the 0.047 µF bootstrap capacitor from SW to BTST.
21	BTST	passive	PWM high-side driver positive supply connected internally to the cathode of the bootstrap diode; connect the 0.047 µF bootstrap capacitor from SW to BTST.
22	REGN	power_out	PWM low-side driver positive supply output connected internally to the anode of the bootstrap diode; connect a 4.7 µF (10 V rating) ceramic capacitor from REGN to analog GND close to the IC.
23	PMID	passive	Connected to the drain of the RBFET and the drain of HSFET; place a 10 µF capacitor from PMID to GND.
24	VBUS	power_in	Charger input voltage connected to the RBFET with VBUS on its source; place a 1 µF ceramic capacitor from VBUS to GND as close as possible to the device.
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-24(4x4)
Category	Power Management (PMIC)
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage	VVBUS	4		13.5	V		6
Battery voltage	VBAT			4.52	V		6
Input current	IVBUS			3.2	A		6
Output current (SW)	ISW			3.2	A		6
Fast charging current	IBAT			3	A		6
RMS discharge current	IBAT			6	A		6
Ambient temperature	TA	-40		85	°C		6
Voltage VAC (converter not switching)	VAC	-2		22	V	converter not switching	6
Voltage VBUS (converter not switching)	VBUS	-2		22	V	converter not switching	6
Voltage PMID (converter not switching)	VPMID	-0.3		22	V	converter not switching	6
Voltage SW	VSW	-0.3		16	V		6
Voltage BAT, SYS (converter not switching)	VBAT, VSYS	-0.3		7	V	converter not switching	6
Voltage BTST	VBTST	-0.3		22	V		6
Voltage BATSNS (converter not switching)	VBATSNS	-0.3		7	V	converter not switching	6
Voltage D+, D-, STAT, SCL, SDA, INT, CE, TS, QON, REGN		-0.3		7	V		6
Output sink current STAT, INT				6	mA		6
Junction temperature	TJ	-40		150	°C		6
Storage temperature	Tstg	-55		150	°C		6
Enter Sleep mode threshold	VSLEEP	15	60	110	mV	VBUS falling, VBUS - VBAT, VBAT = 4V	7
Exit Sleep mode threshold	VSLEEPZ	115	220	340	mV	VBUS rising, VBUS - VBAT, VBAT = 4V	7
VAC overvoltage rising threshold to turn off switching	VACOV	5.45	5.85	6.07	V	VAC rising, OVP[1:0]=00	7
VAC overvoltage rising threshold to turn off switching	VACOV	6.1	6.4	6.75	V	VAC rising, OVP[1:0]=01	7
VAC overvoltage rising threshold to turn off switching	VACOV	10.45	11	11.55	V	VAC rising, OVP[1:0]=10	7
VAC overvoltage rising threshold to turn off switching (default)	VACOV	13.5	14.2	14.85	V	VAC rising, OVP[1:0]=11 (default)	7
VAC overvoltage falling threshold to resume switching	VACOV	5.2	5.6	5.8	V	VAC falling, OVP[1:0]=00	7
VAC overvoltage falling threshold to resume switching	VACOV	5.8	6.2	6.45	V	VAC falling, OVP[1:0]=01	7
VAC overvoltage falling threshold to resume switching	VACOV	10	10.7	11.1	V	VAC falling, OVP[1:0]=10	7
VAC overvoltage falling threshold to resume switching (default)	VACOV	13	13.9	14.5	V	VAC falling, OVP[1:0]=11 (default)	7
BAT depletion falling threshold to turn off BATFET	VBAT_DPL	2.18	2.4	2.55	V	VBAT falling	8
Bad adapter detection threshold	VPOORSRC	3.75	3.9	4	V	VBUS falling	8
Charge voltage accuracy	VREG_ACC	4.173	4.19	4.2	V	VREG = 4.19 V, TJ = -40°C - 85°C	8
Charge voltage accuracy	VREG_ACC	4.332	4.35	4.367	V	VREG = 4.35 V, TJ = -40°C - 85°C	8
Fast charge current regulation accuracy	ICHG_ACC	0.2112	0.24	0.2688	A	ICHG = 0.24 A, VBAT = 3.1 V or 3.8 V, TJ = -40°C - 85°C	8
Fast charge current regulation accuracy	ICHG_ACC	1.2972	1.38	1.4628	A	ICHG = 1.38 A, VBAT = 3.1 V or 3.8 V, TJ = -40°C - 85°C	8
Precharge current accuracy	IPRECHG_ACC	102	120	138	mA	VBAT = 2.6 V, IPRECHG = 120 mA	8
Termination current accuracy	ITERM_ACC	162	180	192	mA	ITERM = 180 mA, ICHG > 780 mA, VREG = 4.35 V, TJ = -40°C - 85°C	8
Termination current accuracy	ITERM_ACC	42	60	78	mA	ITERM = 60mA, ICHG = < 780 mA, VREG = 4.35 V, TJ = -40°C - 85°C	8
Battery LOWV rising threshold to start fast-charge	VBATLOWV	3	3.12	3.24	V	VBAT rising	9
Battery LOWV falling threshold to stop fast-charge	VBATLOWV	2.7	2.8	2.9	V	VBAT falling	9
Battery recharge threshold	VRECHG	90	120	150	mV	VRECHG=0, VBAT falling (default)	9
Battery recharge threshold	VRECHG	185	210	245	mV	VRECHG=1, VBAT falling	9
Battery overvoltage rising threshold	VBAT_OVP	103	104	105	%	VBAT rising, as percentage of VREG	9
Input voltage regulation accuracy	VINDPM_ACC	4.365	4.5	4.635	V		9
Input current regulation accuracy	IINDPM_ACC	450	465	500	mA	IINDPM = 500 mA (TJ=-40°C - 85°C)	9
Input current regulation accuracy	IINDPM_ACC	750	835	900	mA	IINDPM = 900 mA (TJ=-40°C-85°C)	9
Input current regulation accuracy	IINDPM_ACC	1300	1390	1500	mA	IINDPM = 1500 mA (TJ=-40°C-85°C)	9
PWM switching frequency	FSW	1.32	1.5	1.68	MHz	Oscillator frequency	11
Battery voltage exiting boost mode	VBST_BAT	2.4	2.5	2.6	V	BAT falling	11
Boost mode voltage regulation accuracy	VBST_ACC	4.85	5	5.15	V	IVBUS = 0 A, BOOST_V = 5 V	11
Boost mode maximum output current limit	IBST_ACC	1.2	1.4	1.6	A		11
REGN LDO output voltage	VREGN	4.58	4.7	4.8	V	VVBUS = 5 V, IREGN = 20 mA	11
Charge safety timer accuracy	tSAFETY	17	20	24	hr	CHG_TIMER = 20hr	12
Charge safety timer accuracy	tSAFETY	8	10	12	hr	CHG_TIMER = 10hr	12
Junction-to-ambient thermal resistance (JEDEC)	RθJA		35.6		°C/W		6
Junction-to-case (top) thermal resistance	RθJC(top)		22.7		°C/W		6
Junction-to-board thermal resistance	RθJB		11.9		°C/W		7
Junction-to-top characterization parameter	ΨJT		0.2		°C/W		7
Junction-to-board characterization parameter	ΨJB		1.2		°C/W		7
Junction-to-case (bottom) thermal resistance	RθJC(bot)		2.6		°C/W		7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	copper		1. Place input capacitor as close as possible to PMID pin and GND pin connections and use shortest copper	51

CAD (KiCad official)

Symbol: BQ25611DRTWT
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: WQFN-24(4x4) (KiCad packages3D, STEP)
3D model files: bq25611drtwt-etched.step / bq25611drtwt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25611drtwt.step / bq25611drtwt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (63 pp, sha256 389b6ef272ca0182, retrieved 2026-10-20, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# BQ25611DRTWT

**Texas Instruments** · Battery Management · WQFN-24(4x4)

BQ25611DRTWT from Texas Instruments, in a WQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VAC | power_in | Input voltage sensing pin that must be tied to VBUS. |
| 2 | D+ | bidirectional | Positive USB data line used for D+/D- based host and charging port detection, including DCD, BC1.2 primary and secondary detection, and nonstandard adapters. |
| 3 | D- | bidirectional | Negative USB data line used for D+/D- based host and charging port detection, including DCD, BC1.2 primary and secondary detection, and nonstandard adapters. |
| 4 | STAT | output | Open-drain charger status output that is LOW during charge in progress, HIGH when charge is complete or in SLEEP mode, and blinks at 1 Hz on charge suspend fault; connect to a logic rail through 10 kΩ. |
| 5 | SCL | input | I2C interface clock input that must be connected to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data line that must be connected to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that must be connected to a logic rail through 10 kΩ and sends an active-low 256 µs pulse to report charger status and faults. |
| 8 | NC | unconnected | Not connected. |
| 9 | CE | input | Charge enable input where battery charging is enabled when the pin is driven LOW. |
| 10 | BATSNS | input | Battery voltage sense input for charge voltage regulation, which should be connected to the positive battery terminal; if open or shorted to ground, BATSNS_STAT is set and the charger regulates through BAT. |
| 11 | TS | input | Battery temperature qualification input for an NTC thermistor, where charge and boost mode are suspended when the TS voltage is out of range. |
| 12 | QON | input | BATFET enable/reset control input with an internal 6.5 V clamp, where a LOW of tSHIPMODE exits ship mode and a LOW of tQON_RST (minimum 8 s) resets the system by turning BATFET off for tBATFET_RST (minimum 250 ms). |
| 13 | BAT | power_out | Battery connection to the positive terminal of the battery pack, with the internal current sense resistor between SYS and BAT; connect a 10 µF capacitor closely to this pin. |
| 14 | BAT | power_out | Battery connection to the positive terminal of the battery pack, with the internal current sense resistor between SYS and BAT; connect a 10 µF capacitor closely to this pin. |
| 15 | SYS | power_out | System output connection point with the internal current sense resistor between SYS and BAT; connect a 10 µF (min) capacitor closely to this pin. |
| 16 | SYS | power_out | System output connection point with the internal current sense resistor between SYS and BAT; connect a 10 µF (min) capacitor closely to this pin. |
| 17 | GND | power_in | Ground reference for the device. |
| 18 | GND | power_in | Ground reference for the device. |
| 19 | SW | passive | Switching node connecting to the output inductor, internally connected to the source of HSFET and drain of LSFET; connect the 0.047 µF bootstrap capacitor from SW to BTST. |
| 20 | SW | passive | Switching node connecting to the output inductor, internally connected to the source of HSFET and drain of LSFET; connect the 0.047 µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | passive | PWM high-side driver positive supply connected internally to the cathode of the bootstrap diode; connect the 0.047 µF bootstrap capacitor from SW to BTST. |
| 22 | REGN | power_out | PWM low-side driver positive supply output connected internally to the anode of the bootstrap diode; connect a 4.7 µF (10 V rating) ceramic capacitor from REGN to analog GND close to the IC. |
| 23 | PMID | passive | Connected to the drain of the RBFET and the drain of HSFET; place a 10 µF capacitor from PMID to GND. |
| 24 | VBUS | power_in | Charger input voltage connected to the RBFET with VBUS on its source; place a 1 µF ceramic capacitor from VBUS to GND as close as possible to the device. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VVBUS | 4 |  | 13.5 | V |  | 6 |
| Battery voltage | VBAT |  |  | 4.52 | V |  | 6 |
| Input current | IVBUS |  |  | 3.2 | A |  | 6 |
| Output current (SW) | ISW |  |  | 3.2 | A |  | 6 |
| Fast charging current | IBAT |  |  | 3 | A |  | 6 |
| RMS discharge current | IBAT |  |  | 6 | A |  | 6 |
| Ambient temperature | TA | -40 |  | 85 | °C |  | 6 |
| Voltage VAC (converter not switching) | VAC | -2 |  | 22 | V | converter not switching | 6 |
| Voltage VBUS (converter not switching) | VBUS | -2 |  | 22 | V | converter not switching | 6 |
| Voltage PMID (converter not switching) | VPMID | -0.3 |  | 22 | V | converter not switching | 6 |
| Voltage SW | VSW | -0.3 |  | 16 | V |  | 6 |
| Voltage BAT, SYS (converter not switching) | VBAT, VSYS | -0.3 |  | 7 | V | converter not switching | 6 |
| Voltage BTST | VBTST | -0.3 |  | 22 | V |  | 6 |
| Voltage BATSNS (converter not switching) | VBATSNS | -0.3 |  | 7 | V | converter not switching | 6 |
| Voltage D+, D-, STAT, SCL, SDA, INT, CE, TS, QON, REGN |  | -0.3 |  | 7 | V |  | 6 |
| Output sink current STAT, INT |  |  |  | 6 | mA |  | 6 |
| Junction temperature | TJ | -40 |  | 150 | °C |  | 6 |
| Storage temperature | Tstg | -55 |  | 150 | °C |  | 6 |
| Enter Sleep mode threshold | VSLEEP | 15 | 60 | 110 | mV | VBUS falling, VBUS - VBAT, VBAT = 4V | 7 |
| Exit Sleep mode threshold | VSLEEPZ | 115 | 220 | 340 | mV | VBUS rising, VBUS - VBAT, VBAT = 4V | 7 |
| VAC overvoltage rising threshold to turn off switching | VACOV | 5.45 | 5.85 | 6.07 | V | VAC rising, OVP[1:0]=00 | 7 |
| VAC overvoltage rising threshold to turn off switching | VACOV | 6.1 | 6.4 | 6.75 | V | VAC rising, OVP[1:0]=01 | 7 |
| VAC overvoltage rising threshold to turn off switching | VACOV | 10.45 | 11 | 11.55 | V | VAC rising, OVP[1:0]=10 | 7 |
| VAC overvoltage rising threshold to turn off switching (default) | VACOV | 13.5 | 14.2 | 14.85 | V | VAC rising, OVP[1:0]=11 (default) | 7 |
| VAC overvoltage falling threshold to resume switching | VACOV | 5.2 | 5.6 | 5.8 | V | VAC falling, OVP[1:0]=00 | 7 |
| VAC overvoltage falling threshold to resume switching | VACOV | 5.8 | 6.2 | 6.45 | V | VAC falling, OVP[1:0]=01 | 7 |
| VAC overvoltage falling threshold to resume switching | VACOV | 10 | 10.7 | 11.1 | V | VAC falling, OVP[1:0]=10 | 7 |
| VAC overvoltage falling threshold to resume switching (default) | VACOV | 13 | 13.9 | 14.5 | V | VAC falling, OVP[1:0]=11 (default) | 7 |
| BAT depletion falling threshold to turn off BATFET | VBAT_DPL | 2.18 | 2.4 | 2.55 | V | VBAT falling | 8 |
| Bad adapter detection threshold | VPOORSRC | 3.75 | 3.9 | 4 | V | VBUS falling | 8 |
| Charge voltage accuracy | VREG_ACC | 4.173 | 4.19 | 4.2 | V | VREG = 4.19 V, TJ = -40°C - 85°C | 8 |
| Charge voltage accuracy | VREG_ACC | 4.332 | 4.35 | 4.367 | V | VREG = 4.35 V, TJ = -40°C - 85°C | 8 |
| Fast charge current regulation accuracy | ICHG_ACC | 0.2112 | 0.24 | 0.2688 | A | ICHG = 0.24 A, VBAT = 3.1 V or 3.8 V, TJ = -40°C - 85°C | 8 |
| Fast charge current regulation accuracy | ICHG_ACC | 1.2972 | 1.38 | 1.4628 | A | ICHG = 1.38 A, VBAT = 3.1 V or 3.8 V, TJ = -40°C - 85°C | 8 |
| Precharge current accuracy | IPRECHG_ACC | 102 | 120 | 138 | mA | VBAT = 2.6 V, IPRECHG = 120 mA | 8 |
| Termination current accuracy | ITERM_ACC | 162 | 180 | 192 | mA | ITERM = 180 mA, ICHG > 780 mA, VREG = 4.35 V, TJ = -40°C - 85°C | 8 |
| Termination current accuracy | ITERM_ACC | 42 | 60 | 78 | mA | ITERM = 60mA, ICHG = < 780 mA, VREG = 4.35 V, TJ = -40°C - 85°C | 8 |
| Battery LOWV rising threshold to start fast-charge | VBATLOWV | 3 | 3.12 | 3.24 | V | VBAT rising | 9 |
| Battery LOWV falling threshold to stop fast-charge | VBATLOWV | 2.7 | 2.8 | 2.9 | V | VBAT falling | 9 |
| Battery recharge threshold | VRECHG | 90 | 120 | 150 | mV | VRECHG=0, VBAT falling (default) | 9 |
| Battery recharge threshold | VRECHG | 185 | 210 | 245 | mV | VRECHG=1, VBAT falling | 9 |
| Battery overvoltage rising threshold | VBAT_OVP | 103 | 104 | 105 | % | VBAT rising, as percentage of VREG | 9 |
| Input voltage regulation accuracy | VINDPM_ACC | 4.365 | 4.5 | 4.635 | V |  | 9 |
| Input current regulation accuracy | IINDPM_ACC | 450 | 465 | 500 | mA | IINDPM = 500 mA (TJ=-40°C - 85°C) | 9 |
| Input current regulation accuracy | IINDPM_ACC | 750 | 835 | 900 | mA | IINDPM = 900 mA (TJ=-40°C-85°C) | 9 |
| Input current regulation accuracy | IINDPM_ACC | 1300 | 1390 | 1500 | mA | IINDPM = 1500 mA (TJ=-40°C-85°C) | 9 |
| PWM switching frequency | FSW | 1.32 | 1.5 | 1.68 | MHz | Oscillator frequency | 11 |
| Battery voltage exiting boost mode | VBST_BAT | 2.4 | 2.5 | 2.6 | V | BAT falling | 11 |
| Boost mode voltage regulation accuracy | VBST_ACC | 4.85 | 5 | 5.15 | V | IVBUS = 0 A, BOOST_V = 5 V | 11 |
| Boost mode maximum output current limit | IBST_ACC | 1.2 | 1.4 | 1.6 | A |  | 11 |
| REGN LDO output voltage | VREGN | 4.58 | 4.7 | 4.8 | V | VVBUS = 5 V, IREGN = 20 mA | 11 |
| Charge safety timer accuracy | tSAFETY | 17 | 20 | 24 | hr | CHG_TIMER = 20hr | 12 |
| Charge safety timer accuracy | tSAFETY | 8 | 10 | 12 | hr | CHG_TIMER = 10hr | 12 |
| Junction-to-ambient thermal resistance (JEDEC) | RθJA |  | 35.6 |  | °C/W |  | 6 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 22.7 |  | °C/W |  | 6 |
| Junction-to-board thermal resistance | RθJB |  | 11.9 |  | °C/W |  | 7 |
| Junction-to-top characterization parameter | ΨJT |  | 0.2 |  | °C/W |  | 7 |
| Junction-to-board characterization parameter | ΨJB |  | 1.2 |  | °C/W |  | 7 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) |  | 2.6 |  | °C/W |  | 7 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | 1. Place input capacitor as close as possible to PMID pin and GND pin connections and use shortest copper | 51 |

## CAD (KiCad official)

- Symbol: `BQ25611DRTWT`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: WQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files: `bq25611drtwt-etched.step` / `bq25611drtwt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq25611drtwt.step` / `bq25611drtwt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq25611d) (63 pp, sha256 `389b6ef272ca0182`, retrieved 2026-10-20, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bq25611drtwt-datasheet.pdf)