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BQ25606RGER

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Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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BQ25606RGER

Texas Instruments · Battery Management · VQFN-24-EP(4x4)

BQ25606RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VAC input Input voltage sensing pin for USB/adapter detection monitoring VAC threshold for input present qualification and overvoltage protection in range 3.36V to 14.91V.
2 NC unconnected No connection; this pin must be left floating.
3 D+ bidirectional Positive line of USB data pair for BC1.2 and nonstandard adapter detection to determine input current limit; voltage range -0.3V to 7V.
4 D- bidirectional Negative line of USB data pair for BC1.2 and nonstandard adapter detection to determine input current limit; voltage range -0.3V to 7V.
5 STAT tri_state Open-drain charger status output indicating LOW during charging, HIGH when complete/disabled, or blinking at 1Hz on fault condition; maximum sink current 6mA.
6 OTG input Boost mode enable digital input; OTG operation enabled when pulled HIGH to supply 5.15V output from battery; cannot be left floating; voltage range -0.3V to 7V.
7 PG tri_state Open-drain active-low power good indicator; outputs LOW when input voltage between UVLO and ACOV, above sleep threshold, and input current >30mA; requires 10kΩ pull-up resistor.
8 ILIM input Analog input to set input current limit via resistor to ground when unknown adapter detected; IINDPM = KILIM/RILIM with acceptable range 500mA to 3200mA.
9 CE input Charge enable digital input; battery charging enabled when driven LOW; voltage range -0.3V to 7V with input thresholds VIL=0.4V and VIH=1.3V.
10 ICHG input Analog input to set charge current limit via resistor to ground; ICHG = KICHG/RICHG with acceptable range 300mA to 3000mA and ±6% regulation accuracy.
11 TS input Analog temperature input for JEITA profile qualification using negative temperature coefficient thermistor; charging current reduced to 20% and voltage reduced to 4.1V at cool/warm temperatures; voltage range -0.3V to 7V.
12 VSET input Analog input to set default battery charge voltage via resistor pull-down to GND: >50kΩ yields 4.208V, <500Ω yields 4.352V, 5-25kΩ yields 4.400V; regulation accuracy ±0.5%.
13 BAT power_in Battery positive terminal connection point; internal current sensing resistor connected between SYS and BAT with 19.5mΩ on-resistance; connect 10µF capacitor closely to pin.
14 BAT power_in Battery positive terminal connection continuation point; part of internal current sensing and power path network between SYS and BAT for efficient charging.
15 SYS power_out Converter regulated output connection point maintaining system voltage typically 50mV above battery or clamped at 3.5V minimum; internal current sensing resistor between SYS and BAT; connect 20µF capacitor close to pin.
16 SYS power_out Converter regulated output connection continuation point; part of narrow VDC power path architecture providing system supply.
17 GND power_in Power ground and signal ground connection point; all ground connections must be tied together and connected to PCB ground plane.
18 GND power_in Power ground and signal ground connection continuation point; must be soldered to PCB ground plane for electrical and thermal performance.
19 SW passive Switching node connecting to output inductor; internally connected to source of HSFET and drain of LSFET; connect 0.047µF bootstrap capacitor from SW to BTST; voltage range -2V to 16V.
20 SW passive Switching node continuation point; part of high-frequency buck converter switching path for efficient power transfer.
21 BTST power_in Bootstrap voltage supply for high-side MOSFET gate drive; internally connected to bootstrap diode cathode; connect 0.047µF capacitor from SW to BTST; voltage range 0-22V absolute, -0.3 to 7V relative to SW.
22 REGN power_out Regulated voltage output for gate drive and internal bias circuits; supplies bias rail to TS external resistors; output voltage 5.6-6.65V at 9V input or 4.6-4.9V at 5V input; connect 4.7µF (10V) ceramic capacitor close to IC.
23 PMID passive Power path mid-point node connected to drain of RBFET and HSFET in buck converter; connect 10µF ceramic capacitor between PMID and GND; voltage range -0.3V to 22V.
24 VBUS power_in Charger input voltage from USB/adapter with operating range 3.9V to 13.5V and absolute maximum 22V; internal RBFET connected between VBUS and PMID; place 1µF ceramic capacitor from VBUS to GND close to IC.
25 Thermal Pad power_in Exposed pad providing electrical ground connection and low thermal impedance heat dissipation path from die to PCB ground plane; junction-to-board thermal resistance 9.2°C/W; must be soldered to ground with sufficient thermal vias.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: BQ25606RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: bq25606rger-etched.step / bq25606rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25606rger.step / bq25606rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 99f5ade685ee50d1, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF