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BQ25601RTWR

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Texas Instruments Battery Management ICs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BQ25601RTWR

Texas Instruments · Battery Management ICs · QFN-24-EP(4x4)

BQ25601RTWR from Texas Instruments, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VAC input Charge input voltage sense pin that must be connected to the VBUS pin.
2 PSEL input Power source selection input: pulled high sets a 500 mA input current limit and pulled low sets a 2.4 A limit, until the host programs the IINDPM register.
3 PG output Open-drain active-low power-good indicator, pulled up through a 10-kΩ resistor; LOW indicates a good input source between UVLO and ACOV with current limit above 30 mA.
4 STAT output Open-drain charge status output pulled up through 10 kΩ: LOW while charging, HIGH when charge is complete or in SLEEP, and 1-Hz pulses on charge suspend (fault).
5 SCL input I2C interface clock, connected to the logic rail through a 10-kΩ resistor.
6 SDA bidirectional I2C interface data, open drain, connected to the logic rail through a 10-kΩ resistor.
7 INT output Open-drain interrupt output connected to a logic rail through 10 kΩ, sending an active-low 256-µs pulse to report charger status and faults.
8 NC unconnected No connect; keep the pin floating.
9 CE input Charge enable pin; battery charging is enabled when this pin is driven low.
10 NC unconnected No connect; keep the pin floating.
11 TS input Temperature qualification voltage input for the JEITA profile using an NTC thermistor in a divider from REGN to GND (103AT-2 recommended); charge suspends when out of range.
12 QON input BATFET enable/reset control input with an internal 200-kΩ pull-up; a low of tSHIPMODE exits ship mode and a low of at least 8 s (tQON_RST) resets the system when VBUS is absent.
13 BAT bidirectional Battery connection to the positive terminal of the battery pack, with the internal BATFET and current sensing between SYS and BAT; connect a 10 µF capacitor close to the pin.
14 BAT bidirectional Battery connection to the positive terminal of the battery pack, with the internal BATFET and current sensing between SYS and BAT; connect a 10 µF capacitor close to the pin.
15 SYS power_out Converter output connection point with the current sensing network between SYS and BAT; connect a 20 µF capacitor close to the pin.
16 SYS power_out Converter output connection point with the current sensing network between SYS and BAT; connect a 20 µF capacitor close to the pin.
17 GND power_in Ground.
18 GND power_in Ground.
19 SW power_out Switching node output connected to the output inductor, with a 0.047-µF bootstrap capacitor from SW to BTST.
20 SW power_out Switching node output connected to the output inductor, with a 0.047-µF bootstrap capacitor from SW to BTST.
21 BTST passive PWM high-side driver positive supply, internally connected to the bootstrap diode cathode; connect a 0.047-µF capacitor from SW to BTST.
22 REGN power_out LSFET driver and internal supply output; connect a 4.7-µF (10-V rating) ceramic capacitor from REGN to GND close to the IC.
23 PMID passive Connected to the drain of the reverse blocking MOSFET (RBFET) and the HSFET drain; place a 10 µF ceramic capacitor from PMID to GND.
24 VBUS power_in Charger input with the internal reverse-blocking MOSFET between VBUS and PMID; place a 1-µF ceramic capacitor from VBUS to GND close to the device.
25 Thermal Pad power_in Ground reference and thermal pad that conducts heat from the device, to be tied externally to a ground plane through PCB vias.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-24-EP(4x4)
Category Power Management ICs
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VBUS operating input voltage VBUS 3.9 13.5 V 7
Operating ambient temperature TA -40 85 °C 8
Battery voltage VBATOP 4.624 V 7
Fast charging current IBATOP 3 A 7
Input current (VBUS) Iin 3.25 A 7
Abs max VAC, VBUS VAC, VBUS -2 22 V converter not switching 7
Abs max BTST, PMID BTST, PMID -0.3 22 V converter not switching 7
Abs max SW SW -2 16 V 7
Operating junction temperature TJ -40 150 °C 7
Storage temperature Tstg -65 150 °C 7
Junction-to-ambient thermal resistance RθJA 35.6 °C/W RTW (WQFN) 24 pins 8
Junction-to-case (top) thermal resistance RθJC(top) 22.7 °C/W 8
Junction-to-board thermal resistance RθJB 11.9 °C/W 8
Battery discharge current IBAT 17 33 µA VBAT = 4.5 V, HIZ Mode or No VBUS, I2C disabled, BATFET Disabled. TJ < 85°C 8
Battery discharge current IBAT 58 85 µA VBAT = 4.5 V, HIZ Mode or No VBUS, I2C Disabled, BATFET Enabled. TJ < 85°C 8
Input supply current HIZ IVBUS_HIZ 37 50 µA VVBUS = 5 V, High-Z Mode, No battery 8
Input supply current HIZ IVBUS_HIZ 68 90 µA VVBUS = 12 V, High-Z Mode, No battery 8
VBUS operating range VBUS_OP 3.9 13.5 V VVBUS rising 8
VBUS for active I2C, no battery VVAC_UVLOZ 3.3 3.6 V VVAC rising 8
VAC present VVAC_PRESENT 3.65 3.9 V VVAC rising 8
Sleep mode falling threshold VSLEEP 15 60 110 mV VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC falling 9
VAC 6.5-V OV rising threshold VVAC_OV_RISE 6.1 6.4 6.7 V VAC rising; OVP (REG06[7:6]) = '01' 9
VAC 10.5-V OV rising threshold VVAC_OV_RISE 10.35 10.9 11.5 V VAC rising, OVP (REG06[7:6]) = '10' 9
VAC 14-V OV rising threshold VVAC_OV_RISE 13.5 14.2 14.85 V VAC rising, OVP (REG06[7:6]) = '11' 9
Battery depletion threshold falling VBAT_DPL_FALL 2.2 2.6 V VBAT falling 9
Bad adapter detection falling threshold VBUSMIN_FALL 3.75 3.9 4 V VBUS falling 9
Maximum DC system voltage output VSYSMAX 4.4 4.45 4.48 V ISYS = 0 A, , Q4 off, VVBAT≤ 4.400 V, VVBAT > VSYS_MIN = 3.5V 9
RBFET on-resistance RON(RBFET) 45 mΩ -40°C≤ TA ≤ 125°C 9
SYS-BAT MOSFET on-resistance RON(BAT-SYS) 19.5 24 mΩ QFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = 25°C 9
SYS-BAT MOSFET on-resistance RON(BAT-SYS) 19.5 30 mΩ QFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = -40 - 125°C 10
Charge voltage setting 4.208 V VBATREG 4.187 4.208 4.229 V VREG (REG04[7:3]) = 4.208 V (01011), V, -40 ≤ TJ ≤ 85°C 10
Charge voltage setting 4.352 V VBATREG 4.33 4.352 4.374 V VREG (REG04[7:3]) = 4.352 V (01111), V, -40 ≤ TJ ≤ 85°C 10
Charge voltage setting accuracy VBATREG_ACC -0.5 0.5 % VBAT = 4.208 V or VBAT = 4.352 V, -40 ≤ TJ ≤ 85°C 10
Charge current regulation 240 mA ICHG_REG 0.216 0.24 0.264 A ICHG = 240 mA, VVBAT = 3.1V or VVBAT = 3.8 V 10
Charge current regulation 720 mA ICHG_REG 0.685 0.72 0.755 A ICHG = 720 mA, VVBAT = 3.1V or VVBAT = 3.8 V 10
Charge current regulation 1.38 A ICHG_REG 1.311 1.38 1.449 A ICHG = 1.38 A, VVBAT = 3.1 V or VVBAT = 3.8 V 10
Precharge current regulation IPRECHG 153 171 189 mA IPRECHG[3:0] = '0010' = 180 mA 10
Battery LOWV falling threshold VBATLOWV_FALL 2.7 2.8 2.9 V ICHG = 240 mA 10
Battery LOWV rising threshold VBATLOWV_RISE 3 3.12 3.24 V Pre-charge to fast charge 10
Termination current ITERM 150 180 216 mA ICHG > 780 mA, ITERM[3:0] = '0010' = 180 mA, VVBAT = 4.208 V 10
Termination current ITERM 162 180 192 mA ICHG ≤ 780 mA, , ITERM[3:0] = '0010' = 180 mA 10
Battery short voltage falling VSHORT 1.85 2 2.15 V VBAT falling 10
Battery short current ISHORT 70 90 110 mA VBAT < VSHORTZ 10
Recharge threshold below VBAT_REG VRECHG 90 120 150 mV VBAT falling, REG04[0] = 0 10
Input voltage regulation limit 3.9 V VINDPM 3.78 3.95 4.1 V VINDPM (REG06[3:0] = 0000) = 3.9 V 11
Input voltage regulation limit 4.4 V VINDPM 4.268 4.4 4.532 V VINDPM (REG06[3:0] = 0110) = 4.4 V 11
USB input current regulation limit 500 mA IINDPM 450 500 mA VVBUS = 5 V, current pulled from SW, IINDPM (REG[4:0] = 00100) = 500 mA, -40 ≤ TJ ≤ 85°C 11
USB input current regulation limit 1.5 A IINDPM 1.3 1.5 A VVBUS = 5 V, current pulled from SW, IINDPM (REG[4:0] = 01110) = 1.5 A, -40 ≤ TJ ≤ 85°C 11
Battery OVP rising threshold VBATOVP_RISE 103 104 105 % VBAT rising, as percentage of VBAT_REG 11
Thermal shutdown rising temperature TSHUT 160 °C Temperature Increasing 11
HSFET cycle-by-cycle overcurrent threshold IHSFET_OCP 5.2 8 A 12
PWM switching frequency buck fSW 1320 1500 1680 kHz Oscillator frequency, buck mode 12
PWM switching frequency boost fSW 1150 1412 1660 kHz Oscillator frequency, boost mode 12
Boost mode regulation voltage VOTG_REG 4.972 5.126 5.28 V VBAT = 3.8 V, I(PMID) = 0 A, BOOSTV[1:0] = '10' = 5.15 V 12
OTG mode output current IOTG 1.2 1.4 1.6 A BOOST_LIM (REG02[7]) = 1 12
OTG overvoltage threshold VOTG_OVP 5.55 5.8 6.15 V Rising threshold 12
REGN LDO output voltage VREGN 5.6 6 V VVBUS = 9V, IREGN = 40mA 13
REGN LDO output voltage VREGN 4.6 4.7 V VVBUS = 5V, IREGN = 20mA 13
Charge safety timer range tSAFETY 8 10 12 hr CHG_TIMER = 1 13
Digital low power clock fLPDIG 18 30 45 kHz REGN LDO disabled 13
ESD HBM V(ESD) -2000 2000 V Human body model, all pins 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper 1. Place input capacitor as close as possible to PMID pin and GND pin connections and use shortest copper 53

CAD (KiCad official)

  • Symbol: BQ25601RTWR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: bq25601rtwr-etched.step / bq25601rtwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25601rtwr.step / bq25601rtwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (65 pp, sha256 1da39d8af8789279, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF