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Contents

README

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BQ25302RTER

Texas Instruments · Battery Management ICs · WQFN-16-EP(3x3)

BQ25302RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBUS power_in Charger input voltage (4.1 V to 6.2 V operating, 28 V abs max) with the reverse-blocking MOSFET between VBUS and PMID; place a 2.2 µF ceramic capacitor from VBUS to GND as close to the IC as possible.
2 REGN power_out Low-side FET driver positive supply output; connect a 2.2 µF ceramic capacitor from REGN to GND close to the IC.
3 STAT output Open-drain charge status output, connected to REGN via a current-limiting resistor and LED: LOW while charging, open when charge complete or disabled, blinks on fault.
4 ICHG input Charge current program input; connect a 1% resistor to ground to set ICHG = 40,000 / RICHG, no capacitor allowed, and charging stops if the pin is open or shorted to ground.
5 POL input This pin must be left floating.
6 EN input Device disable input; the device is enabled with EN floating or pulled low and disabled when EN is pulled high.
7 TS input Battery temperature protection voltage input for an NTC thermistor (103AT-2 recommended) with a resistor divider from REGN to TS to GND; charge suspends when out of range, and if unused use 10 kΩ from REGN to TS and 10 kΩ from TS to GND.
8 NC unconnected No connection; keep this pin floating or grounded.
9 VSET input Charge voltage setting input programmed by a pull-down resistor to GND: floating 4.1 V, short to GND 4.2 V, 51 kΩ 4.35 V, 10 kΩ 4.4 V, with maximum 50 pF capacitance allowed.
10 BAT input Battery voltage sensing input connected to the positive battery terminal and inductor output node, with a 10 µF capacitor recommended.
11 GND power_in Ground, connected directly to the thermal pad on the top layer, with a single-point connection between power and analog ground near the IC GND pins.
12 GND power_in Ground, connected directly to the thermal pad on the top layer, with a single-point connection between power and analog ground near the IC GND pins.
13 SW power_out Switching node connected to the output inductor, internally the HSFET source and LSFET drain, with a 0.047 µF bootstrap capacitor from SW to BTST.
14 SW power_out Switching node connected to the output inductor, internally the HSFET source and LSFET drain, with a 0.047 µF bootstrap capacitor from SW to BTST.
15 BTST passive High-side FET driver supply connected internally to the bootstrap diode cathode; connect a 0.047 µF bootstrap capacitor from SW to BTST.
16 PMID passive Connection to the drain of the reverse-blocking MOSFET and the high-side MOSFET; place a 10 µF ceramic capacitor from PMID to GND as close to the IC as possible.
17 Thermal Pad power_in Ground reference and thermal pad that conducts heat from the device, to be tied externally to a ground plane through vias under the pad.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Supply Chip
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VBUS voltage (converter not switching) VBUS -2 28 V converter not switching 6
PMID voltage PMID -0.3 28 V converter not switching 6
SW voltage SW -2 20 V -3V for 10ns transient 6
BTST voltage BTST -0.3 25.5 V 6
STAT voltage STAT -0.3 5.5 V 6
BAT voltage BAT -0.3 11 V 6
BTST to SW voltage -0.3 5.5 V 6
ICHG pin voltage ICHG -0.3 5.5 V 6
REGN voltage REGN -0.3 5.5 V 6
POL voltage POL -0.3 5.5 V 6
EN voltage /EN -0.3 5.5 V 6
TS voltage TS -0.3 5.5 V 6
VSET voltage VSET -0.3 11 V 11V DC, up to 13V for max 100us 6
STAT output sink current 6 mA 6
REGN output sink current 20 mA 6
Junction temperature TJ -40 150 °C 6
Storage temperature Tstg -65 150 °C 6
ESD HBM V(ESD) -2000 2000 V HBM, all pins 6
ESD CDM V(ESD) -250 250 V CDM, all pins 6
Input voltage VVBUS 4.1 6.2 V 6
Battery voltage VBAT 4.4 V 6
Input current IVBUS 2 A 6
Output current (SW) ISW 2 A 6
Ambient temperature TA -40 85 °C 6
Effective inductance L 0.7 1 µH 6
Effective VBUS capacitance CVBUS 1.1 2.2 µF 6
Effective PMID capacitance CPMID 5 10 µF 7
Effective BAT capacitance CBAT 5 10 µF 7
Junction-to-ambient thermal resistance RθJA 45.8 °C/W JEDEC 7
Junction-to-case (top) thermal resistance RθJC(top) 48.5 °C/W 7
Junction-to-board thermal resistance RθJB 19 °C/W 7
Junction-to-top characterization parameter ΨJT 1.3 °C/W 7
Junction-to-board characterization parameter ΨJB 19 °C/W 7
Junction-to-case (bottom) thermal resistance RθJC(bot) 7.9 °C/W 7
VBUS reverse current from BAT/SW to VBUS IVBUS_REVS 0.07 3 µA VBAT = VSW = 4.5V, VBUS shorted to GND, TJ = -40°C - 85°C 7
VBUS leakage current in disable mode IQ_VBUS_DIS 4.1 µA VBUS = 5V, VBAT = 4V, charger disabled, /EN pulled high, TJ = -40°C - 85°C 7
Leakage current from battery in disable mode IQ_BAT_DIS 1 µA VBUS = 5V, VBAT = 4V, charger disabled, POL grounded, /EN floating, TJ = -40°C - 65°C 7
BAT and SW pin leakage current in HiZ mode IQ_BAT_HIZ 0.17 1 µA VBAT = VSW = 4.5V, VBUS floating, TJ = -40°C - 65°C 7
VBUS operating range VVBUS_OP 4.1 6.2 V 7
VBUS power on reset VVBUS_UVLOZ 3 3.8 V VBUS rising 7
VBUS power on reset hysteresis VVBUS_UVLOZ_HYS 250 mV VBUS falling 7
Condition to turn on REGN VVBUS_LOWV 3.8 3.9 4 V VBUS rising, REGN turns on, VBAT = 3.2V 7
REGN turn-on hysteresis VVBUS_LOWV_HYS 300 mV VBUS falling, REGN turns off, VBAT = 3.2V 7
Enter sleep mode threshold VSLEEP 30 60 100 mV VBUS falling, VBUS - VBAT, VVBUS_LOWV < VBAT < VBATREG 7
Exit sleep mode threshold VSLEEPZ 110 157 250 mV VBUS rising, VBUS - VBAT, VVBUS_LOWV < VBAT < VBATREG 7
VBUS overvoltage rising threshold VVBUS_OVP_RISE 6.2 6.4 6.6 V VBUS rising, converter stops switching 7
VBUS overvoltage falling hysteresis VVBUS_OVP_HYS 500 mV VBUS falling, converter stops switching 7
Q1 on-resistance VBUS to PMID RDSON_Q1 40 65 mΩ VREGN = 5V 7
Q2 high-side on-resistance RDSON_Q2 50 82 mΩ VREGN = 5V 7
Q3 low-side on-resistance RDSON_Q3 45 72 mΩ VREGN = 5V 8
Charge voltage regulation (VSET floating) VBATREG 4.078 4.1 4.118 V VSET pin floating, TJ = -40°C to +85°C 8
Charge voltage regulation (VSET grounded) VBATREG 4.178 4.2 4.218 V VSET pin is grounded, TJ = -40°C to +85°C 8
Charge voltage regulation (VSET 51kΩ) VBATREG 4.328 4.35 4.371 V Connect VSET pin to 51kΩ resistor, TJ = -40°C to +85°C 8
Charge voltage regulation (VSET 10kΩ) VBATREG 4.376 4.4 4.418 V Connect VSET pin to 10kΩ resistor, TJ = -40°C to +85°C 8
Charge current regulation 1.72A ICHG 1.55 1.72 1.89 A ICHG set at 1.72A with RICHG=23.2kΩ, VBAT = 3.8V, VBUS = 5V 8
Charge current regulation 1.0A ICHG 0.9 1 1.1 A ICHG set at 1.0A with RICHG=40.2kΩ, VBAT = 3.8V, VBUS = 5V 8
Charge current regulation 0.5A ICHG 0.4 0.517 0.6 A ICHG set at 0.5A with RICHG=78.7kΩ, VBAT = 3.8V, VBUS = 5V 8
Termination current (1.72A) ITERM 138 172 206 mA ICHG = 1.72A, 10% of ICHG, RICHG=23.2kΩ, BATREG = 4.2V, VBUS = 5V 8
Termination current (1.0A) ITERM 70 100 130 mA ICHG = 1.0A, 10% of ICHG, RICHG=40.2kΩ, BATREG = 4.2V, VBUS = 5V 8
Termination current (500mA) ITERM 33 63 93 mA ICHG=500mA, ITERM =63mA RICHG=78.7kΩ, BATREG = 4.2V, VBUS = 5V 8
Precharge current (RICHG=23.2kΩ) IPRECHG 115 172 225 mA ICHG = 1.72A, 10% of ICHG, RICHG=23.2kΩ, VBATREG = 4.2V, VBAT = 2.5V, VBUS = 5V 8
Precharge current (RICHG=40.2kΩ) IPRECHG 50 100 150 mA ICHG = 1.72A, 10% of ICHG, RICHG=40.2kΩ, VBATREG = 4.2V, VBAT = 2.5V, VBUS = 5V 8
Precharge current (RICHG=78.7kΩ) IPRECHG 28 63 98 mA ICHG = 1.72A, 10% of ICHG, RICHG=78.7kΩ, VBATREG = 4.2V, VBAT = 2.5V, VBUS = 5V 8
VBAT short rising threshold VBAT_SHORT_RISE 2.05 2.2 2.35 V Short to precharge 8
VBAT short falling threshold VBAT_SHORT_FALL 1.85 2 2.15 V Precharge to battery short 8
Battery short current IBAT_SHORT 24 30 36 mA VBAT < VBAT_SHORT_FALL, VBUS = 5V 8
VBAT low-voltage rising threshold VBAT_LOWV_RISE 2.9 3 3.1 V Precharge to fast charge 8
VBAT low-voltage falling threshold VBAT_LOWV_FALL 2.6 2.7 2.8 V Fast charge to precharge 8
Recharge hysteresis below VBATREG VRECHG_HYS 110 160 216 mV VBAT falling 8
Minimum input voltage regulation VINDPM_MIN 4 4.07 4.2 V VBAT = 3.5V, measured at PMID pin 8
Input voltage regulation VINDPM 4.15 4.28 4.41 V VBAT = 4V, measured at PMID pin, VINDPM = 1.044*VBAT + 0.125V 8
Input current regulation IINDPM_2A_5V 2.1 2.25 2.4 A VVBUS = 5V 8
Battery overvoltage rising threshold VBAT_OVP_RISE 101.9 103.5 105 % VBAT rising, as percentage of VBATREG 8
Battery overvoltage falling threshold VBAT_OVP_FALL 100 101.6 103.1 % VBAT falling, as percentage of VBATREG 8
Bootstrap refresh comparator threshold VBTST_REFRESH 2.7 3 3.3 V (VBTST - VSW) when LSFET refresh pulse is requested, VBUS = 5V 9
HSFET cycle by cycle over current limit threshold IHSFET_OCP 5.2 6.2 6.7 A 9
Junction temperature regulation accuracy TREG 111 120 133 °C 9
PWM switching frequency FSW 1.02 1.2 1.38 MHz SW node frequency 9
ICHG pin regulated voltage VICHG 993 998 1003 mV 9
RICHG threshold to clamp precharge and termination current RICHG_HIGH 60 65 70 kΩ RICHG > RICHG_HIGH 9
Charge current ratio (1.72A) KICHG 36000 40000 44000 AxΩ ICHG set at 1.72A with RICHG = 23.2kΩ, VBAT=3.8V, VBUS=5V, ICHG = KICHG / RICHG 9
Charge current ratio (1.0A) KICHG 36000 40280 44000 AxΩ ICHG set at 1.0A with RICHG = 40.2kΩ, VBAT = 3.8V, VBUS = 5V, ICHG = KICHG / RICHG 9
Charge current ratio (0.5A) KICHG 32000 40700 48000 AxΩ ICHG set at 0.5A with RICHG = 78.7kΩ, VBAT = 3.8V, VBUS = 5V, ICHG = KICHG / RICHG 9
TCOLD threshold rising VT1% 72.68 73.5 74.35 % VTS rising, as percentage to VREGN 9
TCOLD threshold falling VT1% 70.68 71.5 72.33 % VTS falling As Percentage to VREGN 9
THOT threshold falling VT3% 46.35 47.25 48.15 % VTS falling, as percentage to VREGN 9
THOT threshold rising VT3% 47.35 48.25 49.15 % VTS rising As percentage to VREGN 10
Fast charge safety timer tSAFETY_FAST 15 20 24 hr Fast charge safety timer 20 hours 10
Precharge safety timer tSAFETY_PRE 1.5 2 2.5 hr Precharge safety timer 10
Input low threshold VILO 0.4 V Falling 10
Input high threshold VIH 1.3 V Rising 10
High-level leakage current at /EN pin IBIAS 1 µA /EN pin is pulled up to 1.8 V 10
VBUS OVP reaction time tVBUS_OV 200 ns VBUS rising above VBUS_OV threshold to converter turnoff 10
Delay from enable at /EN pin to charger power on tCHG_ON_EN 245 ms /EN pin voltage rising 10
Delay from VBUS to charge start tCHG_ON_VBUS 275 ms /EN pin is grounded, batttery present 10
STAT pin sink current ISTAT_SINK 6 mA 9
Thermal shutdown rising threshold TSHUT 150 °C Temperature increasing 9
Maximum PWM duty cycle DMAX 97 % 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Place input capacitor as close as possible to PMID pin and GND pin and use shortest copper trace 27

CAD (KiCad official)

  • Symbol: BQ25302RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: bq25302rter-etched.step / bq25302rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25302rter.step / bq25302rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 b57f7cefbc2b08bd, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF