Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

BQ25300RTER

Texas Instruments · Battery Management · QFN-16-EP(3x3)

BQ25300RTER from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBUS power_in Charger input voltage in range 4.1V to 17V; reverse blocking MOSFET source connects here.
2 REGN power_out Low-side FET driver positive supply output from internal 5V LDO.
3 STAT tri_state Charge status indication open-drain output; pulled LOW during charging, open on completion, blinks at 1Hz for faults.
4 ICHG input Charge current program input; set charging current via ICHG = KICHG (40000) / RICHG; charging disabled if open or shorted to GND.
5 POL input EN pin polarity selection input; determines enable/disable logic for EN pin.
6 EN input Device enable/disable input; controls device power-up and charging based on POL pin setting.
7 TS input Battery temperature voltage input from NTC thermistor; charge suspends when temperature outside 0°C to 45°C window.
8 NC unconnected No connection; keep pin floating or grounded.
9 VSET input Charge voltage setting input; set final battery regulation voltage to 3.6V, 4.05V, 4.15V, or 4.2V via resistor divider.
10 BAT input Battery voltage sensing input; connect to battery positive terminal and inductor output node for voltage regulation feedback.
11 GND power_in Ground reference connected to thermal pad; single point connection recommended between power and analog ground.
12 GND power_in Ground reference connected to thermal pad; single point connection recommended between power and analog ground.
13 SW tri_state Switching node connected to output inductor; internally connected to source of high-side MOSFET and drain of low-side MOSFET.
14 SW tri_state Switching node connected to output inductor; internally connected to source of high-side MOSFET and drain of low-side MOSFET.
15 BTST power_out High-side FET driver bootstrap supply connected to bootstrap diode cathode; provides isolated gate drive voltage for high-side MOSFET.
16 PMID tri_state Power intermediate node connected to drain of reverse blocking MOSFET and drain of high-side MOSFET; actively switches between input and converter voltages.
17 Thermal Pad power_in Ground reference and thermal pad for die heat dissipation; must be soldered to PCB ground plane with vias for thermal conduction.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: BQ25300RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: bq25300rter-etched.step / bq25300rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25300rter.step / bq25300rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 52e186bdbb938ace, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF