component
BQ24735RGRT
Public Made by Adomby adom
Texas Instruments Battery Management, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ24735RGRT
Texas Instruments · Battery Management · VQFN-20(3.5x3.5)
BQ24735RGRT from Texas Instruments, in a VQFN-20(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ACN | input | Input current sense resistor negative input; place optional 0.1µF ceramic from ACN to GND for common-mode filtering and 0.1µF from ACN to ACP for differential filtering. |
| 2 | ACP | input | Input current sense resistor positive input; place 0.1µF ceramic from ACP to GND for common-mode filtering and 0.1µF from ACN to ACP for differential filtering. |
| 3 | CMSRC | passive | ACDRV charge pump source input; a 4kΩ resistor to the common source of ACFET (Q1) and RBFET (Q2) limits in-rush current on the pin. |
| 4 | ACDRV | output | Charge pump output driving ACFET and RBFET gates, 6V above CMSRC when ACDET is between 2.4V and 3.15V, VCC is above UVLO and VCC is 275mV above SRN; use a 4kΩ series resistor to the gates. |
| 5 | ACOK | output | AC adapter detection open-drain output, pulled high by an external 10kΩ pull-up when ACDET is between 2.4V and 3.15V, VCC is above UVLO and 275mV above SRN, otherwise pulled low by the internal MOSFET. |
| 6 | ACDET | input | Adapter detection input programmed by a resistor divider from the adapter input to GND; above 0.6V with VCC above UVLO enables the REGN LDO, ACOK comparator and IOUT. |
| 7 | IOUT | output | Buffered adapter or charge current output selectable by SMBus ChargeOption(), at 20 times the sense resistor differential voltage; use 100pF or less decoupling capacitor to GND. |
| 8 | SDA | bidirectional | SMBus open-drain data I/O connected to the host or smart battery data line with a 10kΩ pull-up. |
| 9 | SCL | input | SMBus open-drain clock input connected to the host or smart battery clock line with a 10kΩ pull-up. |
| 10 | ILIM | input | Charge current limit input set by a divider from the 3.3V rail; the lower of ILIM or DAC limit sets the regulation limit, above 1.6V disables ILIM control, below 75mV disables charge/discharge and above 105mV enables it. |
| 11 | BATDRV | output | Charge pump output driving the battery-to-system BATFET, 6V above SRN to turn it on and equal to SRN to turn it off; use a 4kΩ resistor to the gate. |
| 12 | SRN | input | Charge current sense resistor negative input and battery voltage sense; connect through a 7.5Ω resistor with 0.1µF to GND for filtering. |
| 13 | SRP | input | Charge current sense resistor positive input; connect through a 10Ω resistor to the sense resistor with 0.1µF differential filtering capacitor. |
| 14 | GND | power_in | IC ground; connect to the analog ground plane and only to the power ground plane through the PowerPAD underneath the IC. |
| 15 | LODRV | output | Low side power MOSFET driver output connected to the low side n-channel MOSFET gate. |
| 16 | REGN | power_out | 6V linear regulator output supplied from VCC, active when ACDET is above 0.6V and VCC is above UVLO; connect a 1µF ceramic capacitor to GND. |
| 17 | BTST | power_in | High side MOSFET driver power supply; connect a 0.047µF capacitor from BTST to PHASE and a bootstrap Schottky diode from REGN to BTST. |
| 18 | HIDRV | output | High side power MOSFET driver output connected to the high side n-channel MOSFET gate. |
| 19 | PHASE | passive | High side power MOSFET driver source, connected to the source of the high side n-channel MOSFET. |
| 20 | VCC | power_in | Input supply, diode-ORed from adapter or battery voltage; use a 10Ω resistor and 1µF capacitor to ground as a low pass filter to limit inrush current. |
| 21 | PowerPAD | power_in | Exposed pad beneath the IC joining analog and power ground at a single star point; always solder to the board with vias to the ground planes, also serves as thermal pad. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-20(3.5x3.5) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
BQ24735RGRT - Footprint:
Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm - 3D model: VQFN-20(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
bq24735rgrt-etched.step/bq24735rgrt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24735rgrt.step/bq24735rgrt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
49d4e7a43dd79779, retrieved 2026-10-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).