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BQ24705RGER

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Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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BQ24705RGER

Texas Instruments · Battery Management · VQFN-24-EP(4x4)

BQ24705RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PVCC power_in IC power positive supply (5 to 24 V operating); place a 0.1-µF ceramic capacitor from PVCC to PGND close to the IC.
2 CHGEN input Charge enable active-low logic input; LO enables charge, HI disables charge.
3 ACN input Adapter current sense resistor negative input; a 0.1-µF capacitor from ACN to ACP provides differential-mode filtering, with an optional 0.1-µF from ACN to AGND.
4 ACP input Adapter current sense resistor positive input; a 0.1-µF capacitor from ACN to ACP provides differential filtering and 0.1 µF from ACP to AGND provides common-mode filtering.
5 ACDET input Adapter detect voltage set input via resistor divider; adapter detected above 2.4 V, IADAPT amplifier active above 0.6 V, and charge disabled by ACOV when ACDET exceeds 3.1 V.
6 ACSET input Adapter current set input; the ACSET to VREF voltage ratio programs the DPM input current regulation set-point, set by a divider from VREF or an external DAC.
7 AGND power_in Analog ground for low-current sensitive analog and digital signals; connect to PGND only through the PowerPad underneath the IC.
8 VREF power_out 3.3-V regulated voltage output for ratiometric programming and internal circuit source; place a 1-µF ceramic capacitor from VREF to AGND.
9 VADJ input Charge voltage set input; the VADJ to VREF ratio programs the battery voltage regulation set-point, and connecting VADJ to REGN programs the default 4.2 V per cell.
10 ACGOOD output Valid adapter active-low open-drain output, pulled low when input voltage is above the ACDET threshold; requires a 10-kΩ pullup to the supply rail.
11 ISYNSET input Synchronous mode current set input; a resistor to AGND programs the charge undercurrent threshold for non-synchronous operation at low output current.
12 IADAPT output Adapter current sense amplifier output equal to 20 times the ACP-ACN differential voltage; use a 100-pF or smaller decoupling capacitor to AGND.
13 SRSET input Charge current set input; the SRSET to VREF ratio programs the charge current regulation set-point, set by a divider from VREF or an external DAC.
14 BAT input Battery voltage remote sense; kelvin-connect to battery pack positive terminal with a 0.1-µF capacitor from BAT to AGND.
15 SRN input Charge current sense resistor negative input; a 0.1-µF capacitor from SRN to SRP provides differential-mode filtering, with an optional 0.1-µF to AGND.
16 SRP input Charge current sense resistor positive input; a 0.1-µF capacitor from SRN to SRP provides differential-mode filtering and 0.1 µF from SRP to AGND provides common-mode filtering.
17 CELLS input Cell count selection logic input; low programs 3 cells, high programs 4 cells, floating programs 2 cells.
18 DPMDET output DPM input current loop active open-drain status output; low indicates input current is limited by reducing charge current, with a 10-kΩ pullup to VREF or another rail.
19 PGND power_in Power ground for the high-current converter node; connect directly to the low-side MOSFET source and to AGND only through the PowerPad.
20 LODRV output PWM low-side driver output; connect to the gate of the low-side power MOSFET with a short trace.
21 REGN power_out PWM low-side driver positive 6-V supply output; connect a 1-µF ceramic capacitor to PGND and a Schottky diode from REGN to BTST for bootstrap.
22 PH passive PWM high-side driver negative supply; connect to the phase switching node and via a 0.1-µF bootstrap capacitor to BTST.
23 HIDRV output PWM high-side driver output; connect to the gate of the high-side power MOSFET with a short trace.
24 BTST power_in PWM high-side driver positive supply; connect a 0.1-µF bootstrap capacitor from BTST to PH and a Schottky diode from REGN to BTST.
25 PowerPad passive Exposed pad beneath the IC; always solder to the board with vias to AGND and PGND planes, where AGND and PGND are star-connected, and serves as thermal pad.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: BQ24705RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: bq24705rger-etched.step / bq24705rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq24705rger.step / bq24705rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 0b0cc2a18bec8bf4, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF