# BQ24630RGER

**Texas Instruments** · Battery Management ICs · QFN-24-EP(4x4)

BQ24630RGER from Texas Instruments, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ACN | input | Adapter-current sense resistor negative input, with a 0.1-μF capacitor from ACN to ACP for differential-mode filtering. |
| 2 | ACP | input | Adapter-current sense resistor positive input, with a 0.1-μF capacitor from ACP to GND for common-mode filtering. |
| 3 | ACDRV | output | AC adapter-to-system MOSFET driver output, connected through a 1-kΩ resistor to the ACFET gate with asymmetrical gate drive and break-before-make logic with respect to BATDRV. |
| 4 | CE | input | Active-HIGH charge-enable logic input; HI enables charge and LO disables charge, with an internal 1-MΩ pulldown. |
| 5 | STAT1 | output | Open-drain charge-status output indicating various charger operations, as defined in Table 2. |
| 6 | TS | input | Temperature qualification voltage input for the battery NTC thermistor, programmed with a resistor divider from VREF to TS to GND. |
| 7 | TTC | input | Safety timer and termination control; a capacitor from this node to GND sets the timer, and LOW disables both timer and termination. |
| 8 | PG | output | Open-drain power-good status output, active-LOW when VCC is valid (not in UVLO, ACOV, or SLEEP mode) and active-HIGH when VCC is invalid. |
| 9 | STAT2 | output | Open-drain charge-status output indicating various charger operations, as defined in Table 2. |
| 10 | VREF | power_out | 3.3-V regulated voltage output that requires a 1-μF ceramic capacitor to GND close to the IC and is used to program voltage, current and TS thresholds. |
| 11 | ISET1 | input | Fast-charge current-set input whose voltage programs the fast-charge current-regulation set point. |
| 12 | VFB | output | Output-voltage analog feedback adjustment; a resistive divider from the battery terminals to this node sets the battery-regulation voltage. |
| 13 | SRN | input | Charge-current sense resistor negative input, with a 0.1-μF capacitor from SRN to SRP for differential-mode filtering. |
| 14 | SRP | input | Charge-current sense resistor positive input, with a 0.1-μF capacitor from SRP to GND for common-mode filtering. |
| 15 | ISET2 | input | Termination-current set input whose voltage programs the termination current trigger point. |
| 16 | ACSET | input | Adapter-current set input whose voltage programs the input current regulation set-point during dynamic power management (DPM). |
| 17 | GND | power_in | Low-current sensitive analog/digital ground, to be connected to the thermal pad underneath the IC. |
| 18 | REGN | power_out | PWM low-side driver positive 6-V supply output that requires a 1-μF ceramic capacitor to GND close to the IC and supplies the BTST bootstrap through a Schottky diode. |
| 19 | LODRV | output | PWM low-side driver output, connected to the low-side power MOSFET gate with a short trace. |
| 20 | PH | passive | PWM high-side driver negative supply connected to the phase-switching node at the junction of the low-side MOSFET drain, high-side MOSFET source and output inductor. |
| 21 | HIDRV | output | PWM high-side driver output, connected to the high-side power MOSFET gate with a short trace. |
| 22 | BTST | power_in | PWM high-side driver positive supply, with a 0.1-μF bootstrap capacitor from PH to BTST and a bootstrap Schottky diode from REGN to BTST. |
| 23 | BATDRV | output | Battery-to-system MOSFET driver output, connected through a 1-kΩ resistor to the input BAT P-channel FET gate, with asymmetrical gate drive and break-before-make logic with respect to ACDRV. |
| 24 | VCC | power_in | IC power positive supply, connected through a 10-Ω resistor to the diode-OR point, with a 1-μF ceramic capacitor from VCC to GND close to the IC. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-24-EP(4x4) |
| Category | Power Management ICs |
| Pins | 25 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | 3. Place the inductor input terminal as close as possible to the switching MOSFET output terminal. Minimize the copper area of this trace to lower electrical and magnetic field radiation, but make the | 30 |

## CAD (KiCad official)

- Symbol: `BQ24630RGER`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `bq24630rger-etched.step` / `bq24630rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24630rger.step` / `bq24630rger.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24630) (41 pp, sha256 `7ed6c8ddd87d2f74`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bq24630rger-datasheet.pdf)