component
BQ24617RGER
Public Made by Adomby adom
Texas Instruments Battery Management ICs, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownBQ24617RGER
Texas Instruments · Battery Management ICs · VQFN-24-EP(4x4)
BQ24617RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ACN | input | Adapter current-sense resistor negative input, with a 0.1-μF ceramic capacitor from ACN to ACP for differential-mode filtering (absolute max -0.3 to 33 V). |
| 2 | ACP | input | Adapter current-sense resistor positive input, with a 0.1-μF capacitor from ACN to ACP and a 0.1-μF capacitor from ACP to GND. |
| 3 | ACDRV | output | AC adapter-to-system MOSFET driver output, connected through a 1-kΩ resistor to the gate of the ACFET and the reverse-blocking P-channel MOSFET, with asymmetrical quick-off, slow-on drive. |
| 4 | CE | input | Active-HIGH charge enable logic input where HI enables charge and LO disables it, with an internal 1-MΩ pulldown resistor. |
| 5 | STAT1 | output | Open-drain charge status output indicating charger operation (see Table 2). |
| 6 | TS | input | Temperature qualification voltage input for the battery pack NTC thermistor, with the hot and cold window programmed by a resistor divider from VREF to TS to GND. |
| 7 | TTC | input | Safety timer and termination control; a capacitor to GND sets the timer, LOW disables timer and termination, HIGH disables the timer but allows termination. |
| 8 | PG | output | Open-drain power-good output, active LOW when VCC is valid (not in UVLO, ACOV or SLEEP) and HIGH when VCC is invalid. |
| 9 | STAT2 | output | Open-drain charge status output indicating charger operation (see Table 2). |
| 10 | VREF | power_out | 3.3-V regulated voltage output, decoupled with a 1-μF ceramic capacitor to GND, usable for programming voltage/current regulation and the TS threshold. |
| 11 | ISET1 | input | Fast-charge current-set input whose voltage programs the fast-charge current regulation set point (max 3.3 V recommended). |
| 12 | VFB | input | Output voltage analog feedback input connected to a resistive divider from the battery terminals to set the battery regulation voltage. |
| 13 | SRN | input | Charge current-sense resistor negative input, with a 0.1-μF capacitor from SRN to SRP for differential-mode filtering. |
| 14 | SRP | input | Charge current-sense resistor positive input, with a 0.1-μF capacitor from SRN to SRP and a 0.1-μF capacitor from SRP to GND. |
| 15 | ISET2 | input | Precharge and termination current set input whose voltage programs the precharge current set point and termination current trigger point. |
| 16 | ACSET | input | Adapter current-set input whose voltage programs the input current regulation set point during Dynamic Power Management (DPM). |
| 17 | GND | power_in | Low-current sensitive analog and digital ground, connected on the PCB to the thermal pad underneath the IC. |
| 18 | REGN | power_out | PWM low-side driver positive 6-V supply output, with a 1-μF ceramic capacitor to GND and a Schottky diode from REGN to BTST for the bootstrap. |
| 19 | LODRV | output | PWM low-side driver output, connected to the gate of the low-side power MOSFET with a short trace. |
| 20 | PH | passive | PWM high-side driver negative supply connected to the phase-switching node (low-side MOSFET drain, high-side MOSFET source and output inductor). |
| 21 | HIDRV | output | PWM high-side driver output, connected to the gate of the high-side power MOSFET with a short trace. |
| 22 | BTST | power_in | PWM high-side driver positive supply, with a 0.1-μF bootstrap capacitor from PH to BTST and a bootstrap Schottky diode from REGN to BTST. |
| 23 | BATDRV | output | Battery-to-system MOSFET driver output, connected through a 1-kΩ resistor to the gate of the BAT P-channel MOSFET, with asymmetrical quick-off, slow-on drive and break-before-make versus ACDRV. |
| 24 | VCC | power_in | IC positive supply connected through a 10-Ω resistor to the diode-OR common-source point, with a 1-μF ceramic capacitor to GND (5 V to 24 V operating for BQ24617). |
| 25 | Thermal pad | passive | Exposed pad beneath the IC that must be soldered to the board with vias star-connecting to GND and the ground plane for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Supply Chip |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC input voltage operating range (BQ24617) | VVCC_OP | 5 | 24 | V | BQ24617 | 7 | |
| Feedback regulation voltage accuracy | VFB | -0.5 | 0.5 | % | TJ = 0°C to 85°C | 7 | |
| Feedback regulation voltage accuracy | VFB | -0.7 | 0.7 | % | TJ = -40°C to 125°C | 7 | |
| Charge current regulation accuracy | -3 | 3 | % | VIREG_CHG = 40 mV | 7 | ||
| Charge current regulation accuracy | -4 | 4 | % | VIREG_CHG = 20 mV | 7 | ||
| Charge current regulation accuracy | -25 | 25 | % | VIREG_CHG = 5 mV | 7 | ||
| Precharge current regulation accuracy | -4 | 4 | % | VIREG_PRECH = 20 mV | 7 | ||
| Adapter supply current, CE = LOW | IAC | 1 | 1.5 | mA | VVCC > VSRN, VVCC > VUVLO CE = LOW (IC quiescent current) | 7 | |
| Total battery discharge current (SLEEP) | IBAT | 15 | μA | VVCC < VSRN, VVCC > VUVLO (SLEEP) | 7 | ||
| Leakage current into VFB pin | IVFB | 100 | nA | VFB = 2.1 V | 7 | ||
| Termination current accuracy | -4 | 4 | % | VITERM = 20 mV | 8 | ||
| Input current regulation accuracy | -3 | 3 | % | VIREG_DPM = 40 mV | 8 | ||
| AC undervoltage rising threshold | VUVLO | 3.65 | 3.85 | 4 | V | Measure on VCC | 8 |
| VCC LOWV rising threshold, resume charge | 4.35 | 4.5 | V | 8 | |||
| SLEEP falling threshold | VSLEEP_FALL | 40 | 100 | 150 | mV | VVCC, VSRN to enter SLEEP | 8 |
| ACN to SRN falling threshold | VACN-SRN_FALL | 100 | 200 | 310 | mV | VACN, VSRN to turn on BATFET | 8 |
| LOWV threshold | VLOWV | 1.534 | 1.55 | 1.566 | V | Measured on VFB pin, rising | 8 |
| Recharge threshold | VRECHG | 35 | 50 | 65 | mV | Measured on VFB pin, falling | 8 |
| AC overvoltage rising threshold (BQ24617) | VACOV | 25.22 | 26 | 26.78 | V | on VCC (BQ24617) | 9 |
| Cold temperature rising threshold | VLTF | 72.5 | 73.5 | 74.5 | % | As Percentage to VVREF | 9 |
| Hot temperature rising threshold | VHTF | 36.2 | 37 | 37.8 | % | As Percentage to VVREF | 9 |
| Cut-off temperature rising threshold | VTCO | 33.7 | 34.4 | 35.1 | % | As Percentage to VVREF | 9 |
| Charge undercurrent falling threshold | VISYNSET | 1 | 5 | 9 | mV | Switch from SYNCH to NON-SYNCH, VSRP > 2.2 V | 9 |
| VREF regulator voltage | VVREF_REG | 3.267 | 3.3 | 3.333 | V | VVCC > VUVLO, (0- to 35-mA load) | 10 |
| REGN regulator voltage | VREGN_REG | 5.7 | 6 | 6.3 | V | VVCC > 10 V, CE = HIGH, (0- to 40-mA load) | 10 |
| Precharge safety timer range | TPRECHG | 1440 | 1800 | 2160 | s | Precharge time before fault occurs | 10 |
| Fast charge timer accuracy | -10 | 10 | % | 0.01 μF ≤ CTTC ≤ 0.11 μF | 10 | ||
| TTC source/sink current | 45 | 50 | 55 | μA | 10 | ||
| Wake current | IWAKE | 50 | 125 | 200 | mA | RSENSE = 10 mΩ | 10 |
| BATFET drive voltage | VBATDRV_REG | 4.2 | 7 | V | VACN > 5 V and BATFET is on | 10 | |
| ACFET drive voltage | VACDRV_REG | 4.2 | 7 | V | VVCC > 5 V and ACFET is on | 10 | |
| PWM switching frequency | 510 | 600 | 690 | kHz | 11 | ||
| High-side driver turnon resistance | RDS_HI_ON | 3.3 | 6 | Ω | VBTST, VPH = 5.5 V | 11 | |
| Low-side driver turnon resistance | RDS_LO_ON | 4.1 | 7 | Ω | 11 | ||
| CE input low threshold voltage | VIN_LO | 0.8 | V | 11 | |||
| CE input high threshold voltage | VIN_HI | 2.1 | V | 11 | |||
| STAT1, STAT2, PG output-low saturation voltage | VOUT_LO | 0.5 | V | Sink Current = 5 mA | 11 | ||
| Leakage current STAT/PG | IOUT_HI | 1.2 | µA | V = 32 V | 11 | ||
| Abs max VCC, ACP, ACN, SRP, SRN, BATDRV, ACDRV, CE, STAT1, STAT2, PG | -0.3 | 33 | V | 5 | |||
| Abs max PH | -2 | 36 | V | 5 | |||
| Abs max VFB | -0.3 | 16 | V | 5 | |||
| Abs max REGN, LODRV, ACSET, TS, TTC | -0.3 | 7 | V | 5 | |||
| Abs max BTST, HIDRV | -0.3 | 39 | V | with respect to GND | 5 | ||
| Abs max VREF, ISET1, ISET2 | -0.3 | 3.6 | V | 5 | |||
| Abs max difference voltage ACP-ACN, SRP-SRN | -0.5 | 0.5 | V | 5 | |||
| Junction temperature (abs max) | TJ | -40 | 155 | °C | 5 | ||
| Storage temperature | Tstg | -55 | 155 | °C | 5 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 6 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged-device model, JESD22-C101 | 6 | |
| Recommended VCC, ACP, ACN, SRP, SRN, BATDRV, ACDRV, CE, STAT1, STAT2, PG (BQ24617) | -0.3 | 24 | V | BQ24617 | 6 | ||
| Recommended PH | -2 | 30 | V | 6 | |||
| Recommended VFB | -0.3 | 14 | V | 6 | |||
| Recommended REGN, LODRV, ACSET, TS, TTC | -0.3 | 6.5 | V | 6 | |||
| Recommended BTST, HIDRV | -0.3 | 34 | V | with respect to GND | 6 | ||
| Recommended ISET1, ISET2 | -0.3 | 3.3 | V | 6 | |||
| Recommended difference voltage ACP-ACN, SRP-SRN | -0.2 | 0.2 | V | 6 | |||
| Junction temperature (recommended) | TJ | 0 | 125 | °C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 43 | °C/W | RGE VQFN 24 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 54.3 | °C/W | RGE VQFN 24 pins | 6 | ||
| Junction-to-board thermal resistance | RθJB | 20 | °C/W | RGE VQFN 24 pins | 6 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 4 | °C/W | RGE VQFN 24 pins | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 3. Place the inductor input terminal as close as possible to the switching MOSFET output terminal. Minimize the copper area of this trace to lower electrical and magnetic field radiation, but make the | 34 |
CAD (KiCad official)
- Symbol:
BQ24617RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq24617rger-etched.step/bq24617rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24617rger.step/bq24617rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
3ae7b6131566362b, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).