Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

BQ24616RGER

Texas Instruments · Battery Management · VQFN-24-EP(4x4)

BQ24616RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ACN input Adapter current-sense resistor negative input with differential-mode filtering via 0.1-μF capacitor to ACP and optional common-mode filtering to GND.
2 ACP input Adapter current-sense resistor positive input with differential-mode filtering via 0.1-μF capacitor to ACN and common-mode filtering to GND.
3 ACDRV output AC adapter-to-system MOSFET driver output connected through 1-kΩ resistor to ACFET gate with asymmetrical drive and optional slew-control capacitor.
4 CE input Charge-enable active-HIGH logic input with internal 1-MΩ pulldown; high enables charge, low disables charge and resets timers.
5 STAT1 tri_state Open-drain charge-status output indicating charger operation for LED drive or host processor communication.
6 TS input Temperature qualification voltage input for battery thermistor with resistor-divider programming of hot and cold temperature window from VREF to TS to GND.
7 TTC input Fast-charge safety timer and termination control capacitor node where LOW disables both and HIGH disables only fast-charge timer.
8 PG tri_state Open-drain power-good status output active-LOW when VCC is valid (not in UVLO, ACOV, or SLEEP mode) for LED or host processor.
9 STAT2 tri_state Open-drain charge-status output indicating charger operation for LED drive or host processor communication.
10 VREF power_out 3.3-V regulated voltage output with 1-μF capacitor to GND close to IC for voltage/current regulation and TS threshold programming.
11 ISET1 input Fast-charge current-set input with voltage programming fast-charge current regulation set-point; must be higher than 2× termination current.
12 VFB input Output voltage analog feedback adjustment input from resistive voltage divider connected to battery terminals for battery regulation voltage adjustment.
13 SRN bidirectional Charge current-sense resistor negative input with differential-mode filtering via 0.1-μF capacitor to SRP and optional common-mode filtering to GND.
14 SRP bidirectional Charge current-sense resistor positive input with differential-mode filtering via 0.1-μF capacitor to SRN and common-mode filtering to GND.
15 ISET2 input Precharge and termination current-set input with voltage programming precharge current regulation set-point and termination current trigger point.
16 ACSET input Adapter current-set input with voltage programming input current-regulation set-point during dynamic power management (DPM).
17 GND power_in Low-current sensitive analog/digital ground with exposed thermal pad soldered to board and vias connecting to ground plane for heat dissipation.
18 REGN power_out PWM low-side driver positive 6-V supply output with 1-μF capacitor to GND close to IC and Schottky diode to BTST for bootstrap.
19 LODRV output PWM low-side driver output connected with short trace to low-side power MOSFET gate.
20 PH input PWM high-side driver negative supply connected to phase-switching node (low-side drain, high-side source, and output inductor junction).
21 HIDRV output PWM high-side driver output connected with short trace to high-side power MOSFET gate.
22 BTST input PWM high-side driver positive supply with 0.1-μF bootstrap capacitor from PH and Schottky diode from REGN to BTST.
23 BATDRV output Battery-to-system MOSFET driver output connected through 1-kΩ resistor to BATFET gate with asymmetrical drive and optional slew-control capacitor.
24 VCC power_in IC power positive supply connected through 10-Ω resistor to common-source diode-OR point with 1-μF capacitor to GND.
25 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: BQ24616RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: bq24616rger-etched.step / bq24616rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq24616rger.step / bq24616rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 481c7492f39e1622, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF