component
BQ24380DSGR
Public Made by Adomby adom
Texas Instruments Battery Management ICs, WSON-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BQ24380DSGR
Texas Instruments · Battery Management ICs · WSON-8-EP(2x2)
BQ24380DSGR from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power connected to the external DC supply; bypass IN to VSS with a ceramic capacitor (1 µF minimum). |
| 2 | VSS | power_in | Ground terminal; connect to the thermal pad and to the ground rail of the circuit, and it must be connected to ground at all times. |
| 3 | NC | unconnected | Do not connect to any external circuits; these pins may have internal connections used for test purposes. |
| 4 | FAULT | output | Open-drain device status output pulled to VSS internally when the pass FET is turned off due to input overvoltage, output short-circuit, overtemperature, or battery voltage outside safe limits; high impedance during normal operation. |
| 5 | CE | input | Active-low chip enable input; CE high turns the input pass FET off, CE low turns it on, and it is internally pulled down by approximately 200 kΩ. |
| 6 | VBAT | power_in | Battery voltage sense input, connected to the pack positive terminal through a 100-kΩ resistor. |
| 7 | NC | unconnected | Do not connect to any external circuits; these pins may have internal connections used for test purposes. |
| 8 | OUT | output | Output terminal to the charging system; bypass OUT to VSS with a ceramic capacitor (1 µF minimum). |
| 9 | PAD | power_in | Exposed thermal pad internally connected to VSS; it must be connected to the same potential as VSS on the PCB and not used as the primary ground input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Supply Chip |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage IN (wrt VSS) | VI | -0.3 | 30 | V | IN with respect to VSS | 4 | |
| Input voltage OUT (wrt VSS) | VI | -0.3 | 12 | V | OUT with respect to VSS | 4 | |
| Input voltage FAULT, CE, VBAT | VI | -0.3 | 7 | V | with respect to VSS | 4 | |
| Output source current OUT | IOUTmax | 2 | A | 4 | |||
| Output sink current FAULT | 15 | mA | 4 | ||||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged-device model, JESD22-C101 | 4 | |
| IN voltage range | VI | 3.3 | 30 | V | 4 | ||
| Output current, OUT pin | IO | 1.7 | A | 4 | |||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 64 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 84.1 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 33.9 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 1.9 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 34.3 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 5.8 | °C/W | DSG (WSON) 8 pins | 4 | ||
| Undervoltage lock-out, input power detected threshold | UVLO | 2.5 | 2.8 | V | CE = LO or HI, VIN: 0 V → 3 V | 5 | |
| Hysteresis on UVLO | Vhys(UVLO) | 200 | 300 | mV | CE = LO or HI, VIN: 3 V → 0 V | 5 | |
| Operating current (bq24380) | IDD | 250 | μA | CE = LO, no load on OUT pin, VIN = 5 V | 5 | ||
| Standby current | ISTDBY | 100 | μA | CE = HI, VIN = 5.5 V | 5 | ||
| Dropout voltage IN to OUT | VDO | 280 | mV | CE = LO, VIN = 5 V, I(OUT) = 1 A | 5 | ||
| Q1 off-state leakage current | IOFF | 10 | μA | CE = HI, VIN = 5.5 V | 5 | ||
| Output voltage (bq24380) | VO(REG) | 5.3 | 5.5 | 5.7 | V | CE = LO, VIN = 6 V | 5 |
| Input overvoltage protection threshold (bq24380) | VOVP | 6.1 | 6.3 | 6.5 | V | CE = LO, VIN: 5 V → 8 V | 5 |
| Hysteresis on OVP (bq24380) | Vhys(OVP) | 25 | 110 | mV | CE = LO or HI, VIN: 7 V → 5 V | 5 | |
| Short-circuit detection threshold | IO(SC) | 1.3 | 1.5 | 1.7 | A | 3 V < VIN < VOVP - Vhys(OVP) | 5 |
| Retry interval if short-circuit detected | tREC(SC) | 64 | ms | 5 | |||
| Battery overvoltage protection threshold | BVOVP | 4.3 | 4.35 | 4.4 | V | VIN > 4.5 V, CE = LO | 5 |
| Hysteresis on BV(OVP) | Vhys(BVovp) | 200 | 320 | mV | VIN > 4.5 V, CE = LO | 5 | |
| Input bias current on VBAT pin | I(VBAT) | 10 | nA | TJ = 25°C | 5 | ||
| Thermal shutdown temperature | TJ(OFF) | 140 | 150 | °C | 5 | ||
| Thermal shutdown hysteresis | TJ(OFF-HYS) | 20 | °C | 5 | |||
| CE logic LOW input voltage | VIL | 0 | 0.4 | V | 5 | ||
| CE logic HIGH input voltage | VIH | 1.4 | V | 5 | |||
| CE input current low | IIL | 1 | μA | 5 | |||
| CE input current high | IIH | 15 | μA | V CE = 1.8 V | 5 | ||
| FAULT output LOW voltage | VOL | 0.2 | V | ISINK = 5 mA | 5 | ||
| FAULT off-state leakage current, HI-Z | Ilkg | 10 | μA | V FAULT = 5 V | 5 | ||
| Deglitch time, input power detected | tDGL(PGOOD) | 8 | ms | CE = LO or HI, VIN 0 V → 5 V, 1-μs rise-time | 6 | ||
| Input OV propagation delay | tPD(OVP) | 200 | ns | VIN: 5 V → 10 V | 6 | ||
| Recovery time from input overvoltage condition | tREC(OVP) | 8 | ms | CE = LO, VIN: 7 V → 5 V, 1-μs fall-time | 6 | ||
| Deglitch time, battery overvoltage detected | tDGL(BVovp) | 176 | μs | VIN > 4.5 V, CE = LO, VBAT rising from 4.1 V to 4.4 V to FAULT going low | 6 |
CAD (KiCad official)
- Symbol:
BQ24380DSGR - Footprint:
Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm - 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
bq24380dsgr-etched.step/bq24380dsgr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24380dsgr.step/bq24380dsgr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
68b98db1e60807c1, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BQ24380DSGR
**Texas Instruments** · Battery Management ICs · WSON-8-EP(2x2)
BQ24380DSGR from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power connected to the external DC supply; bypass IN to VSS with a ceramic capacitor (1 µF minimum). |
| 2 | VSS | power_in | Ground terminal; connect to the thermal pad and to the ground rail of the circuit, and it must be connected to ground at all times. |
| 3 | NC | unconnected | Do not connect to any external circuits; these pins may have internal connections used for test purposes. |
| 4 | FAULT | output | Open-drain device status output pulled to VSS internally when the pass FET is turned off due to input overvoltage, output short-circuit, overtemperature, or battery voltage outside safe limits; high impedance during normal operation. |
| 5 | CE | input | Active-low chip enable input; CE high turns the input pass FET off, CE low turns it on, and it is internally pulled down by approximately 200 kΩ. |
| 6 | VBAT | power_in | Battery voltage sense input, connected to the pack positive terminal through a 100-kΩ resistor. |
| 7 | NC | unconnected | Do not connect to any external circuits; these pins may have internal connections used for test purposes. |
| 8 | OUT | output | Output terminal to the charging system; bypass OUT to VSS with a ceramic capacitor (1 µF minimum). |
| 9 | PAD | power_in | Exposed thermal pad internally connected to VSS; it must be connected to the same potential as VSS on the PCB and not used as the primary ground input. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Supply Chip |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage IN (wrt VSS) | VI | -0.3 | | 30 | V | IN with respect to VSS | 4 |
| Input voltage OUT (wrt VSS) | VI | -0.3 | | 12 | V | OUT with respect to VSS | 4 |
| Input voltage FAULT, CE, VBAT | VI | -0.3 | | 7 | V | with respect to VSS | 4 |
| Output source current OUT | IOUTmax | | | 2 | A | | 4 |
| Output sink current FAULT | | | | 15 | mA | | 4 |
| Junction temperature | TJ | -40 | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| ESD HBM | V(ESD) | -2000 | | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 |
| ESD CDM | V(ESD) | -500 | | 500 | V | Charged-device model, JESD22-C101 | 4 |
| IN voltage range | VI | 3.3 | | 30 | V | | 4 |
| Output current, OUT pin | IO | | | 1.7 | A | | 4 |
| Junction temperature | TJ | -40 | | 125 | °C | | 4 |
| Junction-to-ambient thermal resistance | RθJA | | 64 | | °C/W | DSG (WSON) 8 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 84.1 | | °C/W | DSG (WSON) 8 pins | 4 |
| Junction-to-board thermal resistance | RθJB | | 33.9 | | °C/W | DSG (WSON) 8 pins | 4 |
| Junction-to-top characterization parameter | ψJT | | 1.9 | | °C/W | DSG (WSON) 8 pins | 4 |
| Junction-to-board characterization parameter | ψJB | | 34.3 | | °C/W | DSG (WSON) 8 pins | 4 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | | 5.8 | | °C/W | DSG (WSON) 8 pins | 4 |
| Undervoltage lock-out, input power detected threshold | UVLO | 2.5 | | 2.8 | V | CE = LO or HI, VIN: 0 V → 3 V | 5 |
| Hysteresis on UVLO | Vhys(UVLO) | 200 | | 300 | mV | CE = LO or HI, VIN: 3 V → 0 V | 5 |
| Operating current (bq24380) | IDD | | | 250 | μA | CE = LO, no load on OUT pin, VIN = 5 V | 5 |
| Standby current | ISTDBY | | | 100 | μA | CE = HI, VIN = 5.5 V | 5 |
| Dropout voltage IN to OUT | VDO | | | 280 | mV | CE = LO, VIN = 5 V, I(OUT) = 1 A | 5 |
| Q1 off-state leakage current | IOFF | | | 10 | μA | CE = HI, VIN = 5.5 V | 5 |
| Output voltage (bq24380) | VO(REG) | 5.3 | 5.5 | 5.7 | V | CE = LO, VIN = 6 V | 5 |
| Input overvoltage protection threshold (bq24380) | VOVP | 6.1 | 6.3 | 6.5 | V | CE = LO, VIN: 5 V → 8 V | 5 |
| Hysteresis on OVP (bq24380) | Vhys(OVP) | 25 | | 110 | mV | CE = LO or HI, VIN: 7 V → 5 V | 5 |
| Short-circuit detection threshold | IO(SC) | 1.3 | 1.5 | 1.7 | A | 3 V < VIN < VOVP - Vhys(OVP) | 5 |
| Retry interval if short-circuit detected | tREC(SC) | | 64 | | ms | | 5 |
| Battery overvoltage protection threshold | BVOVP | 4.3 | 4.35 | 4.4 | V | VIN > 4.5 V, CE = LO | 5 |
| Hysteresis on BV(OVP) | Vhys(BVovp) | 200 | | 320 | mV | VIN > 4.5 V, CE = LO | 5 |
| Input bias current on VBAT pin | I(VBAT) | | | 10 | nA | TJ = 25°C | 5 |
| Thermal shutdown temperature | TJ(OFF) | 140 | | 150 | °C | | 5 |
| Thermal shutdown hysteresis | TJ(OFF-HYS) | | 20 | | °C | | 5 |
| CE logic LOW input voltage | VIL | 0 | | 0.4 | V | | 5 |
| CE logic HIGH input voltage | VIH | 1.4 | | | V | | 5 |
| CE input current low | IIL | | | 1 | μA | | 5 |
| CE input current high | IIH | | | 15 | μA | V CE = 1.8 V | 5 |
| FAULT output LOW voltage | VOL | | | 0.2 | V | ISINK = 5 mA | 5 |
| FAULT off-state leakage current, HI-Z | Ilkg | | | 10 | μA | V FAULT = 5 V | 5 |
| Deglitch time, input power detected | tDGL(PGOOD) | | 8 | | ms | CE = LO or HI, VIN 0 V → 5 V, 1-μs rise-time | 6 |
| Input OV propagation delay | tPD(OVP) | | | 200 | ns | VIN: 5 V → 10 V | 6 |
| Recovery time from input overvoltage condition | tREC(OVP) | | 8 | | ms | CE = LO, VIN: 7 V → 5 V, 1-μs fall-time | 6 |
| Deglitch time, battery overvoltage detected | tDGL(BVovp) | | 176 | | μs | VIN > 4.5 V, CE = LO, VBAT rising from 4.1 V to 4.4 V to FAULT going low | 6 |
## CAD (KiCad official)
- Symbol: `BQ24380DSGR`
- Footprint: `Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm`
- 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `bq24380dsgr-etched.step` / `bq24380dsgr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24380dsgr.step` / `bq24380dsgr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24380) (25 pp, sha256 `68b98db1e60807c1`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bq24380dsgr-datasheet.pdf)