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BQ24297RGET
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Texas Instruments Battery Management, VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BQ24297RGET
Texas Instruments · Battery Management · VQFN-24(4x4)
BQ24297RGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage connected to PMID through the internal reverse blocking MOSFET (RBFET) with VBUS on source; place a 1-µF ceramic capacitor from VBUS to PGND as close to the IC as possible, and the absolute maximum is 15 V with the converter not switching. |
| 2 | D+ | input | Positive line of the USB data pair used for D+/D- based USB host/charging port detection, including data contact detection, primary detection in BC1.2, and non-standard adapter detection (BQ24297 pin function). |
| 3 | D- | input | Negative line of the USB data pair used for D+/D- based USB host/charging port detection, including data contact detection, primary detection in BC1.2, and non-standard adapter detection (BQ24297 pin function). |
| 4 | STAT | output | Open-drain charge status output: LOW indicates charge in progress, HIGH indicates charge complete or charge disabled, and the pin blinks at 1 Hz during any fault; connect to the pull-up rail via a 10-kΩ resistor. |
| 5 | SCL | input | I2C interface clock input; connect SCL to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data line; connect SDA to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that sends an active-low 256-µs pulse to the host to report charger status and faults; connect to a logic rail via a 10-kΩ resistor. |
| 8 | OTG | input | Digital pin that selects USB input current limit in buck mode (500 mA when High and 100 mA when Low for USB host) and is the active-high boost enable when REG01[5] = 1. |
| 9 | CE | input | Active-low charge enable; battery charging is enabled when REG01[5:4] = 01 and CE is Low, and CE must be pulled high or low and not left floating. |
| 10 | ILIM | input | Sets the maximum input current by regulating the ILIM pin at 1 V through a resistor to ground, with IINMAX = (1 V/RILIM) × KILIM, and the minimum input current programmed on this pin is 500 mA. |
| 11 | TS | input | Temperature qualification input for a negative temperature coefficient thermistor, biased by a resistor divider from REGN to TS to GND; charge is suspended or boost is disabled when TS is out of range. |
| 12 | QON | input | BATFET enable control in shipping mode; a logic low-to-high transition with at least 2 ms high level turns on the BATFET to exit shipping mode, and the pin has an internal 1-MΩ (typical) pull-down. |
| 13 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal BATFET connected between BAT and SYS; connect a 10-µF capacitor close to the BAT pin. |
| 14 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal BATFET connected between BAT and SYS; connect a 10-µF capacitor close to the BAT pin. |
| 15 | SYS | power_out | System connection point with the internal BATFET between BAT and SYS; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 16 | SYS | power_out | System connection point with the internal BATFET between BAT and SYS; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 17 | PGND | power_in | Power ground for the high-current converter, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC is recommended. |
| 18 | PGND | power_in | Power ground for the high-current converter, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC is recommended. |
| 19 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 20 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | power_in | Positive supply for the PWM high-side driver, internally connected to the cathode of the bootstrap diode; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 22 | REGN | power_out | Positive supply output for the PWM low-side driver, internally connected to the anode of the bootstrap diode; connect a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND close to the IC, and it also biases the TS pin. |
| 23 | PMID | output | Connected to the drain of the reverse blocking MOSFET and the HSFET drain; connect a 1-µF capacitor from VBUS to PGND and at least 8.2 µF on PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage connected to PMID through the internal reverse blocking MOSFET (RBFET) with VBUS on source; place a 1-µF ceramic capacitor from VBUS to PGND as close to the IC as possible, and the absolute maximum is 15 V with the converter not switching. |
| 25 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
BQ24297RGET - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq24297rget-etched.step/bq24297rget-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24297rget.step/bq24297rget.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
be4518aa56b74298, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BQ24297RGET
**Texas Instruments** · Battery Management · VQFN-24(4x4)
BQ24297RGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage connected to PMID through the internal reverse blocking MOSFET (RBFET) with VBUS on source; place a 1-µF ceramic capacitor from VBUS to PGND as close to the IC as possible, and the absolute maximum is 15 V with the converter not switching. |
| 2 | D+ | input | Positive line of the USB data pair used for D+/D- based USB host/charging port detection, including data contact detection, primary detection in BC1.2, and non-standard adapter detection (BQ24297 pin function). |
| 3 | D- | input | Negative line of the USB data pair used for D+/D- based USB host/charging port detection, including data contact detection, primary detection in BC1.2, and non-standard adapter detection (BQ24297 pin function). |
| 4 | STAT | output | Open-drain charge status output: LOW indicates charge in progress, HIGH indicates charge complete or charge disabled, and the pin blinks at 1 Hz during any fault; connect to the pull-up rail via a 10-kΩ resistor. |
| 5 | SCL | input | I2C interface clock input; connect SCL to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data line; connect SDA to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that sends an active-low 256-µs pulse to the host to report charger status and faults; connect to a logic rail via a 10-kΩ resistor. |
| 8 | OTG | input | Digital pin that selects USB input current limit in buck mode (500 mA when High and 100 mA when Low for USB host) and is the active-high boost enable when REG01[5] = 1. |
| 9 | CE | input | Active-low charge enable; battery charging is enabled when REG01[5:4] = 01 and CE is Low, and CE must be pulled high or low and not left floating. |
| 10 | ILIM | input | Sets the maximum input current by regulating the ILIM pin at 1 V through a resistor to ground, with IINMAX = (1 V/RILIM) × KILIM, and the minimum input current programmed on this pin is 500 mA. |
| 11 | TS | input | Temperature qualification input for a negative temperature coefficient thermistor, biased by a resistor divider from REGN to TS to GND; charge is suspended or boost is disabled when TS is out of range. |
| 12 | QON | input | BATFET enable control in shipping mode; a logic low-to-high transition with at least 2 ms high level turns on the BATFET to exit shipping mode, and the pin has an internal 1-MΩ (typical) pull-down. |
| 13 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal BATFET connected between BAT and SYS; connect a 10-µF capacitor close to the BAT pin. |
| 14 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal BATFET connected between BAT and SYS; connect a 10-µF capacitor close to the BAT pin. |
| 15 | SYS | power_out | System connection point with the internal BATFET between BAT and SYS; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 16 | SYS | power_out | System connection point with the internal BATFET between BAT and SYS; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 17 | PGND | power_in | Power ground for the high-current converter, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC is recommended. |
| 18 | PGND | power_in | Power ground for the high-current converter, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC is recommended. |
| 19 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 20 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | power_in | Positive supply for the PWM high-side driver, internally connected to the cathode of the bootstrap diode; connect the 0.047-µF bootstrap capacitor from SW to BTST. |
| 22 | REGN | power_out | Positive supply output for the PWM low-side driver, internally connected to the anode of the bootstrap diode; connect a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND close to the IC, and it also biases the TS pin. |
| 23 | PMID | output | Connected to the drain of the reverse blocking MOSFET and the HSFET drain; connect a 1-µF capacitor from VBUS to PGND and at least 8.2 µF on PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage connected to PMID through the internal reverse blocking MOSFET (RBFET) with VBUS on source; place a 1-µF ceramic capacitor from VBUS to PGND as close to the IC as possible, and the absolute maximum is 15 V with the converter not switching. |
| 25 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
## CAD (KiCad official)
- Symbol: `BQ24297RGET`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files: `bq24297rget-etched.step` / `bq24297rget-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24297rget.step` / `bq24297rget.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24296) (61 pp, sha256 `be4518aa56b74298`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bq24297rget-datasheet.pdf)